Новини світу мікро- та наноелектроніки

TE, Harwin, and Hirose have released their new next-generation connector families for data centers, industrial systems, and consumer electronics, offering better speed, reliability, and space savings.

Last month, an interesting Class AB audio amplifier was in the spotlight, a monoblock-configured pair of which I’m actually listening to (Widespread Panic’s Light Fuse Get Away, to be precise) as I type these follow-on words:

This time, it’s Class D’s turn in the spotlight. Here’s a summary link to EDN’s voluminous coverage of the technology over the past few decades, and a Wikipedia’s summary:

A class-D amplifier, or switching amplifier, is an electronic amplifier in which the amplifying devices (transistors, usually MOSFETs) operate as electronic switches, and not as linear gain devices as in other amplifiers. They operate by rapidly switching back and forth between the supply rails, using pulse-width modulation, pulse-density modulation, or related techniques to produce a pulse train output. A simple low-pass filter may be used to attenuate their high-frequency content to provide analog output current and voltage. Little energy is dissipated in the amplifying transistors because they are always either fully on or fully off, so efficiency can exceed 90%.

 Tripath, which branded the technology as “Class T”, was the first mainstream-volume supplier of Class D technology. My first exposure to Class D stretches back nearly 30 years, to 2007 when I first met with (and auditioned prototype gear from) D2Audio and its always entertaining (meant as a compliment), not to mention well-informed, Chief Technology Officer Skip Taylor at CES. I subsequently sic’d Skip on my then-colleague, EDN then-Analog Editor Joshua Israelsohn, who had a number of enjoyable mind-melding (maybe also melting?) meetings with Skip and his colleagues. Intersil bought D2Audio a year later, preceded by Texas Instruments’ 2000 acquisition of Burr-Brown and followed by Infineon’s 2018 purchase Merus Audio and Analog Devices’ 2021 Maxim buy (all as trend examples, not intended to be a comprehensive list)…and Class D technology was off to the races.

Class D vs Class AB

Here’s another take on Class D versus the Class AB (and A, for that matter) precursors, from Paul McGowan, the co-founder and CEO of high-end audio equipment supplier PS Audio, whose “Ask Paul” ongoing video series is both entertaining and educational, therefore highly recommended:

That this video comes from Paul (and PS Audio, located just “up the road” from me in Boulder, CO, for that matter) is highly revealing, I think. Audiophiles, the nexus of PS Audio’s customer base, are generally speaking both change-adverse and perversely picky when it comes to perceived quality. That they, who D2Audio was specifically targeting with its demos way back in 2007, were among the first to adopt Class D amplifier technology tells me a few things:

• With all due respect to Schiit co-founder Jason Stoddard, his diatribe about Class D’s tendency to “hiss like a demon cat, drilling slowly into your synapses and draining your soul” is dated and overstated, IMHO at least. As I noted last month, “he might have been right about Class D a few years ago, especially in the near-field configurations he’s specifically advocating for Rekkr, but no longer.”
• More generally, the technology has for a while now been good enough for audiophiles, so I’d wager it’s also good enough for the masses.
• And why was it appealing to audiophiles? Cost for them is a secondary-at-most concern, right? Well, their listening rooms tend to contain massive speakers, requiring formidable amounts of power to drive them. And, as Wikipedia notes, “The major advantage of a class-D amplifier is that it can be much more efficient than a linear amplifier, dissipating less power as heat in the active devices…also, given that large heat sinks are not required, class-D amplifiers are much lighter weight than class-A, -B, or -AB amplifiers.”

Schiit’s Class-AB-based Rekkr

Lighter…and much smaller, too. In the spirit of “a picture paints a thousand words,” here are some examples. First off, here again is the Class AB-based Rekkr (Internet Archive cache link), which is sound-spec’d as follows:

• Stereo, 8 Ohms: 2W RMS per channel
• Stereo, 4 Ohms: 3W RMS per channel
• Mono, 8 Ohms: 4W RMS

with the following form factor-related specs:

• Size: 5” x 3.5” x 1.25”
• Weight: 1 lbs

Schiit’s Class-AB-based Gjallarhorn

Next up is its Gjallarhorn “big brother”, also Class AB-based, also mentioned (but not shown) in last month’s piece, and sound-spec’d as follows:

• Stereo, 8 Ohms: 10W RMS per channel
• Stereo, 4 Ohms: 15W RMS per channel
• Mono, 8 ohms: 30W RMS

with the following form factor-related specs:

• Size: 9” x 6” x 2.5”
• Weight: 8 lbs

Rekkr vs Gjallarhorn size

Here’s a visual comparison of their respective form factors:

Foreground, then background, focus:

Ditto:

Keen-eyed readers may have already noticed that the comparison’s not entirely fair, since the Gjallarhorn integrates the AC/DC conversion circuitry that’s alternatively placed (at least partly) in the Rekkr’s external AC/AC “wall wart”. But as you can see, the Rekkr PSU is pretty tiny, so…:

Enter Class D competitors

Now for the Class D competitors (and, I’d generally argue, successors). Earlier this year, ahead of the looming tariffs, I acquired three different “Chi-Fi” manufacturer/model combinations…not counting the Class D circuitry inside the powered speakers I already owned…or my latest network audio streamer…or my latest sound bar (from Yamaha, replacing the Hisense unit I complained about in May)…all of which you’ll hear more about in other blog posts to come…

The first was a monoblock-only unit, the Fosi Audio V3 Mono:

Its (again, mono in this case) output specs, along with those of the other two devices I’ll be showcasing today, vary depending on the capabilities of the power supply connected to it:

• Rated Power Output : 48V/5A–240W@4Ω ; 32V/5A –100W@4Ω

And here are its form factor details:

• 6 x 4.2 x 1.6 inches (142mm x 105mm x 35mm)
• 06 pounds (0.48)

The second is Douk Audio’s A5, a dual-channel (stereo) Class D amp:

Again, its output specs are power supply voltage-and-current, as well as speaker impedance, dependent. Douk Audio provides more granular detail on its website than Fosi Audio does even in the V3 Mono user manual, unfortunately. But the general trend is similar in practice, given that they’re both based on Texas Instruments’ TPA3255 chipset:

Power Supply	Speaker Impedance	Rated Output Power
32V/5A	4Ω	78W+78W
32V/5A	6Ω	71W+71W
32V/5A	8Ω	65W+65W
36V/6A	4Ω	107W+107W
36V/6A	6Ω	100W+100W
36V/6A	8Ω	94W+94W
48V/5A	4Ω	120W+120W
48V/5A	6Ω	110W+110W
48V/5A	8Ω	102W+102W
48V/10A	4Ω	250W+250W
48V/10A	6Ω	210W+210W
48V/10A	8Ω	185W+185W

And its form factor details? Here you go:

• Dimensions (W*D*H): 95*92*50 mm/3.74*3.62*1.97 in
• Net weight: 506 g/1.12 lb

Last, but definitely not least, is a more recent Douk Audio device upgrade, the A5 Pro, adding both a Bluetooth receiver and a separate headphone output amplifier:

Same TI TPA3255-based audio power amplifier subsystem as with the base A5, so same output specs as shown earlier. The form factor is tweaked a bit (but only a bit, and likely mostly-to-completely to just make room for more knobs-and-such on the front panel), however:

• Dimensions (W*D*H): 130*112*33 mm/5.12*4.41*1.30 in
• Net weight: 525 g/1.16 lb

Schiit Rekkr (AB) vs Fosi Audio V3 (D)

That’s the last of the stock shots, at least for a while; now for some more “real life” ones. First off, here’s how the Schiit Rekkr stacks up (literally) against the Fosi Audio V3 Mono, which is capable of up to (speaker impedance- and power supply-dependent) more than 50x the mono output power at comparable distortion:

Schiit Gjallarhorn (AB) vs Fosi Audio V3 (D)

How about the Schiit Gjallarhorn versus the Fosi Audio V3 Mono? Glad you asked. Again, as a reminder, the latter has ~8X the mono output power in this case, with its beefiest power supply option and when driving the same impedance and at similar (inaudible) distortion levels. Not to mention being half the price (or even less, depending on where it’s sourced and how it’s kitted):

Again, a two-photo foreground-then-background focus shift:

Once again, the detail-oriented among you will point out that the Gjallarhorn chassis also encompasses AC/DC conversion circuitry, external to (and not shown in) the Fosi Audio case. You’re right, although there was a method to my madness. I didn’t want to show three sets of vs-V3 Mono photos, one set with each of the three PSUs I have in my possession: 32V/5A, 48V/5A and 48V/10A. Instead, here are the standalone undersides of the power supplies, capable of being used with any of the three Class D amplifiers I’m covering today. 32V/5A first:

Now 48V/5A:

And finally, the “Big Kahuna” 48V/10A version:

And here they are stacked on top of each other, with the 32V/5A one on top and (obviously) the 48V/10A one on the bottom:

The DC Power Filter

Independent reviews suggest that the incremental power output of the Fosi Audio V3 Mono tails off beyond the 48V/5A point…the Douk Audio units’ additive output performance increases more linearly at 48V/10A, but that’s to be expected as there are two audio power amplifiers—one for each channel—inside. But there’s another reason to run the Fosi Audio V3 Mono—two of them, actually—with a 48V/10A source. In such a configuration, the company also sells what it calls a “DC Power Filter”, which (in conjunction with an appropriate cable option) splits the 10A input current evenly among both of its outputs, enabling a single PSU to concurrently fuel two amplifiers:

I own two DC Power Filters. One came bundled with a two-amplifier set I bought off eBay. The other was a standalone purchase from Fosi’s online store, used with two other V3 Mono amps I got individually (for reasons I’ll explain further in a teardown to come!):

Schiit Gjallarhorn (AB) vs Douk Audio A5 (D)

What about those two Douk Audio units? Here’s the A5, alongside the 48V/5A power supply it came bundled with, on top of the Schiit Gjallarhorn:

Schiit Gjallarhorn (AB) vs Douk Audio A5 Pro (D)

Now for its A5 Pro “big brother”:

Schiit Gjallarhorn (AB) vs Douk Audio A5 + A5 Pro (D)

Because I couldn’t resist, the following shots prove that (after dispensing with the PSUs), I could fit both Douk Audio devices on top of a Gjallarhorn:

All the Class Ds stacked

And in closing, here are all three of today’s Class D devices stacked on top of each other, showcasing their form factor similarities:

Notable observations

Wrapping up, there are a couple of other points I wanted to note. First off, all three of the Class D amps support (believe it or not) user-accessible op-amp swapping:

analogous to the “tube rolling” of times past (and present, for some folks, and potentially others, too…there is, after all, a Vali 2++ now sitting at the top of the Schiit stack on my desk):

Finally, what’s with the “PFFB” promotion prominent on both manufacturers’ websites?

It stands for Post-Filter Feedback, and understanding what it is and does first requires a step (or few) back. Although, as the Wikipedia Class D definition I shared at the beginning of this piece noted, “A simple low-pass filter may be used to attenuate their high-frequency content to provide analog output current and voltage,” in practice the output filtering circuitry tends to be notably more complex than this; to render inaudible the otherwise distorting aforementioned “hiss like a demon cat”, for example, to suppress phase shift artifacts, etc. To reiterate on this circuit’s robustness importance, I’ll turn you over to Paul McGowan again for more on the topic:

PFFB, implemented in TI’s TPA3255 (and others), is the latest evolution in this output filtering scheme. Quoting from Google’s AI Overview summary of the search topic:

PFFB, or Post-Filter Feedback, is a secondary feedback loop in Class-D amplifiers that takes a portion of the signal after the LC output filter and feeds it back to the input to improve audio quality. This technique reduces distortion and improves the linearity of the power stage and output filter components, particularly the inductor, which is a primary source of distortion. PFFB also increases load independence, meaning the amplifier’s performance is less affected by the specific loudspeaker connected.

Here’s a visible example of PFFB’s benefits. First off, an output level-vs-frequency plot from Audio Science Review’s evaluation of the Fosi Audio V3 Mono:

Requoting highly recommended content expert (and long-time personal collaborator) Amir Majidimehr, “There is essentially no impact up to 20 kHz between the 4 and 8 ohm, indicating very low output impedance, albeit with a bit of peaking. Compare that to non-PFFB amps such as Fosi Audio V3 stereo amp:”

The TL;DR (at the end of another long writeup…sorry!) summary of Amir’s findings (and PFFB’s benefits): it suppresses an amplifier’s perceived loudness from otherwise varying with output frequency, not that this arguably was perceptible much if at all previously, candidly (specifically because the variability tended to occur at high frequencies, hard for all but the “golden ears” among us to discern, anyway). But since it now “comes along for the ride” with modern Class D amplifier designs anyway, at little if any incremental cost and with no sonic downside…

With that, encroaching on the 2,300-word threshold, I’m going to sign off for today. More on this topic, including the earlier-promised Class D amplifier teardown, to come soon. Until then, “sound off” with your thoughts in the comments!

—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

 Related Content

• Audio amplifiers: How much power (and at what tradeoffs) is really required?
• EDN Class D amplifier coverage
• Class D audio power amplifiers: Adding punch to your sound design
• The truth about Class D amplifiers

The post Class D: Audio amplifier ascendancy appeared first on EDN.

Today, Tektronix, i.e., Tek, releases its high-performance oscilloscope: The 7 Series digital phosphor oscilloscope (DPO) (Figure 1). This scope is a replacement of its discontinued (but still sought-after) 70000 series, using the same probe set. 

Figure 1 7 Series DPO is a replacement to the legacy 7000 series with the same probe performance, but much lower SNR, ENOB, throughput, and user-friendly touchscreen interface. Source: Tektronix

In a conversation with Tektronix’s Tim Bieber, Principal Product Planner, described the motivation for the new series, “Every 10 to 15 years, we have to replatform instruments because parts get old and the technology moves forward.” This scope is a direct response to the demand after conjoint analysis, or market research that Tek has done over the years with their established customer base. 

A user-friendly, high-performance Tek scope 

The 7 series DPO oscilloscope is the high-performance version of the 2 through 6 series of MSOs, where each series is optimized for different performance capabilities and price points (Figure 2). The unifying factor across this entire portfolio is the user interface (UI) and TekScope PC analysis software developed over a decade ago that allows for remote access to the benchtop instrument as well as offline analysis.

Figure 2 The 2 through 7 Series of Tektronix scopes, all using the same UI and analysis software. Source: Tektronix

“There are customers that want the raw data and don’t do anything with it, but there are other customers that need fairly complex measurements,” said Bieber when highlighting the importance of the analysis software piece of the modern oscilloscope puzzle, “For example, PCIe’s latest generation electrical spec is about 1000 pages long and there’s a couple chapters that go through all the measurements. Very few customers will want to go and develop all these measurements, so they look to the scope vendor to develop that, and we’ve had a package that we’ve had for 20 years.”

Specifications 

Table 1 offers a comparison of the new 7 Series DPO and the older DPO70000 oscilloscopes. The 7 Series DPO is a replacement for the DPO70000 series with all “TekConnect” channels that offer a comparable analog bandwidth from DC to 33 GHz. The TekConnect adapters (TCA) provide less signal distortion than other traditional adapters, such as BNC-to-N or N-to-SMA adapters. 

Tek also offers an Asynchronous Time Interleaving (ATI) architecture in the DPO70000 series, which provides a considerably larger bandwidth via 1.85 mm connectors. Bieber clarified why ATI was not included in the 7 Series DPO, stating that for the current models, which range from DC to 25 GHz, only TekConnect channels are necessary. He added that future 7 Series models with higher bandwidths will incorporate higher bandwidth connectors, such as 1.85 mm connectors.

	7 Series DPO	DPO70000
Channel type	TekConnect channels	TekConnect channels	ATI channels
Number of channels	4 analog	2 to 8 analog	1 to 2 analog
ADC	10-bit	8-bit	8-bit
ENOB (500 mV full scale, signal 90% of full scale)	7.5 bits at 8 GHz to 6.5 bits at 25 GHz	5.1 bits at 8 MHz and 4.8 bits at 25 GHz (for 33 GHz, 100 GS/s)	4.9 bits at ~8 GHz and 4.6 bits at ~25 GHz (for 70 GHz, 200 GS/s ATI channel)
Analog bandwidth	8 GHz to 25 GHz (customer upgradeable)	13 to 33 GHz	50 to 70 GHz
Sample rate per channel	125 GS/s on all 4 channels	100 GS/s	200 GS/s
Record length	500 Mpoints (up to 2 Gpoints option)	62.5 Mpoints (up to 1 Gpoints option)	62.5 Mpoints (up to 1 Gpoints option)
Random noise	0.10% of full scale to 0.23% of full scale, 500 mV full scale	0.69% to 0.83% of full scale, 300 mV full scale	0.43% to 0.71% of full scale, 500 mV full scale
Intrinsic jitter	60 fs (1 µs time duration) and 70 fs (1 ms time duration)	100 fs (10 µs time duration)	65 fs (10 µs time duration)
Probe compatibility	P7700 and P7600 Series TriMode probe	P7500, 7600, and P7700 Series TriMode probes and DPO7OE optical probe
Connectivity	LAN (10G Ethernet on SFP+ and 1000 Base-T on RJ45), USB 3.0 (7 total), DisplayPort, HDMI	PCIe, USB, Thunderbolt, HDMI, DisplayPort, and more
Screen size	15.6-inch HD touchscreen	Not specified, but much smaller

Table 1: A comparison of the newly released 7 series DPO and the older 70000 series.

The 7 Series DPO offers significant performance upgrades over the 70000 series. These enhancements are primarily due to three key improvements in its TekConnect channels:

• Lower learning curve with the TekScope user interface (UI) that would be familiar to Tek customers
• A fast throughput with a 10 Gb Ethernet LAN SFP+ port (on the back of the oscilloscope)
• A clean signal path due to the iterative advancements, yielding two new ASICs, the Tek079 and Tek085, both designed and built in-house

The 10 Gb Ethernet LAN SFP+ port (Figure 3) is ideal for short data runs with a swift offload from the scope for parallel analysis and off-scope processing. Additionally, the faster CPU and on-board GPU will accelerate data processing directly on the scope.

Figure 3 An image of the back of the 7 Series showing the 10 Gb Ethernet LAN SFP+ port, which can accept either a regular RJ45, fiber optic, or direct-attach connection. Source: Tektronix

The new ASICs

At the core of the oscilloscope are the upgrades to the custom preamplifier and ADC, as shown on the acquisition board in Figure 4. Each of these boards has two channels; the signal enters through the inputs to the preamp and ADC, and out to a large FPGA used for triggering and data storage. 

Figure 4 The 7 Series DPO acquisition board showing Tek085 preamplifiers connected directly to the Tek079 ADC (black chips shown on the left-hand side). Source: Tektronix

“This chip (Tek85) has half the noise of the previous preamp called Tek61, which is in our 6 Series product,” said Bieber. The Tek85 chip is fabricated using GlobalFoundries’ 9HP SiGe process. It uses “Quiet Channel” noise reduction technology, which essentially performs the continuous time linear equalization (CTLE) function in hardware instead of software to push channel noise down without increasing the noise floor (a consequence of implementing equalization techniques in software). This, along with the 10-bit ADC, allows the oscilloscope to have a low vertical (random) noise with a high effective number of bits (ENOB). 

The addition of the 7 Series offers a clear upgrade to the older 70000 variant while also benefiting from the enhanced UI/UX of the established 2 through 6 Series Tek scopes.

Aalyia Shaukat, associate editor at EDN, holds a Bachelor’s degree in electrical engineering and has worked in the design publishing industry for nearly ten years. 

Related Content

• Oscilloscope articles by Art Pini
• Tektronix MDO4000 oscilloscopes go multifunction
• A new cost-optimized high-performance oscilloscope
• Building a low-cost, precision digital oscilloscope—Part 1

The post Tektronix releases its new high-performance 7 Series oscilloscope appeared first on EDN.

All About Circuits visited Tektronix HQ in Beaverton, Oregon, to see their new 25 GHz digital phosphor oscilloscope—announced today—featuring lower noise floor and higher ENOB.

3D IC chiplet-based heterogeneous package integration represents the next major evolution in semiconductor design. It allows us to continue scaling system performance despite the physical limitationA sneak peak at 3D IC design toolkits and workflowss of traditional monolithic chip manufacturing. By breaking functional systems into sub-functional chiplets and using advanced packaging integration technologies, we can create more complex, more powerful systems than ever before.

The challenge—and opportunity—for the industry is to lower the barriers to adoption of 3D IC design so that its benefits can become available industry-wide and not just the bleeding edge markets. Thus, the Chiplet Design Exchange (CDX) was formed within the Open Compute Project with the mission of developing easy-to-use, machine-readable design kits (3DKs).

With participation from EDA vendors, foundries, OSATs, and materials providers, the goal was to define standards and workflows for 3D IC design. In other words, a neutral, open foundation that enables efficient chiplet integration and reuse, accelerates innovation, and guarantees manufacturability across organizational boundaries.

 

3D IC design toolkits and workflows

Silicon IC design is supported by a mature ecosystem of IP libraries and standardized process design kits, but advanced packaging has historically lacked a similar infrastructure. 3D IC design requires new, specialized design kits tailored for chiplet-based workflows and advanced package integration complexity.

The CDX group, together with industry partners, defined four primary 3DK categories, each supporting a discrete aspect of 3D IC design, integration, and verification:

• Chiplet design kits (CDKs) provide standardized, reusable chiplet models with the necessary information for seamless system integration.
• Package assembly design kits (PADKs) define essential package rules such as I/O/TSV pitch, substrate and interposer spacing, and component placement guidelines to facilitate manufacturability.
• Material design kits (MDKs) contain composite material properties needed for accurate electrical and reliability simulations.
• Package test design kits (PTDKs) specify test I/O, pin dimensions, and functions, supporting robust automated testing at both the chiplet and system-in-package level.

Figure 1 A chiplet design kit (CDK) is shown as per the JEDEC JEP30 part model. Source: Siemens EDA

Standardizing these kits in machine-readable, EDA-neutral formats closes persistent gaps between silicon, packaging, and test communities. Every stakeholder—whether chiplet vendor, package architect, or manufacturing partner—can contribute, access, and leverage accurate models for design, verification, and production handoff to manufacturing.

The wider availability of 3DKs is driving the emergence of new, fluid 3D IC workflows. Chiplet suppliers can now publish detailed, standards-compliant digital models, creating a catalog of validated IP. Designers can search, evaluate, and select chiplets based on electrical, physical, and performance characteristics—similar to how SoC developers choose IP blocks for traditional integration. This enhances discoverability, accelerates design cycles, and fosters a new business model for silicon IP reuse.

Crucial to this flow is automation in model authoring. Manually crafting CDX-compliant 3DKs at scale is not practical, so the industry is investing in open-source, EDA-neutral authoring tools. Siemens EDA Innovator3D IC exemplifies this trend, providing a unified environment where teams can design, verify, and plan manufacturing in one cockpit. These platforms enable rapid iteration, simulation, and validation of heterogeneous integration, helping organizations reduce costly design spins and reach the market faster.

Figure 2 The Innovator3D IC Integrator facilitates a heterogeneous integration cockpit. Source: Siemens EDA

The AI and 3D IC alliance

Artificial intelligence (AI) and high-performance computing (HPC) are both driving, and benefiting from, progress in 3D IC technology. As scaling of traditional process nodes approaches its physical limits, chiplet integration and advanced packaging become the primary pathways to higher performance and capacity. By stacking high-bandwidth memory near logic, designers achieve higher data transfer rates with reduced latency and power—vital for AI, hyperscalers, and data-intensive applications.

The industry is also crossing new thresholds: single-die reticle limits are being surpassed, and panel-scale organic and glass interposers now support the assembly of thousands of chiplets—resulting in systems with trillions of transistors on a single substrate. The complexity of designing, laying out, and verifying these massive architectures is well beyond the reach of traditional manual processes, especially as electrical, power, thermal, and mechanical dependencies multiply.

AI is therefore becoming an indispensable partner, not just another tool. Machine learning accelerates fundamental EDA tasks, such as SPICE simulation, by orders of magnitude and powers multi-dimensional optimization engines that explore a vast design space automatically. Recent advances allow even legacy tools to achieve significant productivity gains by learning from the design intent and usage patterns, automating and refining iterative processes to deliver greater productivity and better results.

Figure 3 AI is both creating new challenges for semiconductor design and providing solutions to those same challenges. Source: Siemens EDA

One emerging area is the use of AI-driven optimization for physical design, layout, and verification of large-scale 3D assemblies. By encoding design rules, material properties, and system constraints as machine-readable data—rather than static PDF documents—organizations can automate decision-making, error-checking, and design-space exploration.

In the future, a hierarchy of AI agents will actively collaborate, each addressing a specialized workflow (for example, thermal analysis, high-level partitioning, or chiplet floorplanning) and communicate and negotiate based on user guidance and systemic feedback, vastly reducing cycle times and mitigating design risk.

As the industry begins to explore the use of co-packaged optics (CPO) and photonic integration—addressing I/O bottlenecks in massive 3D IC systems—AI’s role will become even more critical, both in design and in real-time adaptation and optimization for manufacturing and field operation.

The next major semiconductor evolution is here

The semiconductor industry’s progression from painstaking, manual layout at the 5-micron node to today’s nanometer-scale devices with trillions of transistors is extraordinary. 3D ICs mark the next great leap, promising new levels of performance, system complexity, and integration—even as Moore’s Law slows.

This evolution demands not just technical advances but organizational transformation. The shift from product-centric thinking to system-level solutions, the rise of cross-disciplinary workflows, and the expanding role of AI and automation are now prerequisites as 3D IC moves from early adoption to mainstream practice.

Open 3DK standards, robust tooling, and EDA-neutral platforms, together with the enablement of AI-augmented flows are laying the foundation for a future where advanced packaging unleashes the full potential of modern electronics.

As we move into the trillion plus-transistor era, innovations in 3D IC design and the power of AI will define what is possible in electronic system design—and ensure that future engineers and systems remain at the leading edge of technology and capability.

Todd Burkholder is a senior editor at Siemens DISW. For over 25 years, he has worked as editor, author, and ghost writer with internal and external customers to create print and digital content across a broad range of EDA technologies. Todd began his career in marketing for high-technology and other industries in 1992 after earning a Bachelor of Science at Portland State University and a Master of Science degree from the University of Arizona.

Tony Mastroianni is the Advanced Packaging Solutions Director at Siemens Digital Industries Software. He has more than 30 years’ experience as an engineer and engineering manager in the global semiconductor industry and currently leads development of advanced packaging solutions for Siemens EDA. Prior to joining Siemens, he served in engineering leadership positions at Inphi and eSilicon. Tony earned a B.S.E.E from Lehigh University and a M.E.E at Rutgers University.

Editor’s Note

This is the second part of the three-part article series about 3D IC architecture. The first part, published last week, provided essential context and practical depth for design engineers working on 3D IC systems. The third and final part, to be published next week, will provide a comprehensive framework for 3D IC integration.

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• Tighter Integration Between Process Technologies and Packaging
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The post Putting 3D IC to work for you appeared first on EDN.

Factories are becoming increasingly connected, with sensors, actuators, machines, and operator devices all demanding seamless, reliable, and low-latency communication. Traditional Wi-Fi struggled to keep up with such dense and demanding environments. Enter Wi-Fi 6 and Wi-Fi 6E the latest generations of Wi-Fi technology, designed not just for speed, but for efficiency, scalability, and resilience in tough industrial settings. With extended spectrum, better interference management, and enhanced capacity, Wi-Fi 6/6E is now well-positioned to meet the evolving needs of smart factory automation.

Wi-Fi 6: Designed for Industrial Demands

Built on the IEEE 802.11ax standard, Wi-Fi 6 supports both 2.4 GHz and 5 GHz bands, offering longer range and higher capacity compared to Wi-Fi 5. The addition of the 6 GHz spectrum under Wi-Fi 6E further boosts scalability by introducing dozens of new channels and reducing congestion.

Factory environments pose unique challenges: thick concrete walls, heavy machinery, and a growing number of connected devices that must communicate continuously with minimal latency. Wi-Fi 6 addresses these demands through features that improve efficiency, reliability, and power management, ensuring smooth operation in 24/7 industrial settings.

Key Features of Wi-Fi 6/6E for Smart Factories

• MU-OFDMA (multi-user orthogonal frequency division multiple access): Enables simultaneous communication with multiple devices, optimizing bandwidth use.
• MU-MIMO (multi-user multiple input multiple output): Supports multiple upload and download streams at the same time.
• 1024-QAM modulation: Packs more data into each symbol, boosting capacity.
• Longer OFDM symbols and guard intervals: Enhance range and resilience in harsh environments.
• BSS coloring: Reduces interference between devices sharing the same channel.
• Target Wake Time: Improves battery life for wireless sensors by allowing them to “wake” only when needed.

The 6 GHz expansion in Wi-Fi 6E, now available across the US, Canada, South Korea, and partially in Europe, further reduces congestion and doubles available capacity—critical for dense factory floors.

Real-World Benefits in Industrial Automation

• Battery-powered sensors gain extended life and reliability thanks to Target Wake Time and reduced interference.
• Control systems and actuators benefit from low latency and consistent quality of service, even when handling small but critical data packets.
• Mobile operator tools like tablets and handheld terminals experience seamless roaming and stable connectivity.
• Augmented reality (AR) devices such as smart glasses achieve higher data rates and responsiveness, supporting new digital workflows.
• Extended range ensures robust coverage across large and challenging factory layouts.

Wi-Fi Meets Bluetooth and Cellular

Looking ahead, smart factories will not rely on a single wireless technology. Wi-Fi 6/6E will coexist with Bluetooth for low-power connections and with 4G/5G cellular networks for wide-area communication. Together, these technologies create a flexible, scalable, and future-proof foundation for Industry 4.0.

(This article has been adapted and modified from content on Ublox.)

The post Wi-Fi 6/6E: Powering the Next Generation of Smart Factory Connectivity appeared first on ELE Times.

Hi everyone, I’ve been lurking here for a while now and loved seeing your projects. Now it’s my turn to contribute — an electroencephalogram (EEG) I built from scratch. It’s open source, and I’d be thrilled if some of you guys try it out, give feedback, or even improve on it! Repo (with gerber files) + demo video are in the comments. submitted by /u/Hopeful_Let_4349 [link] [comments]

Hey everyone! I’ve been tinkering away on a little evening project for a while now and wanted to share it here. The Quansheng UV-K5 handheld radio is fun to hack on, but its original MCU only had 64 kB of flash memory. Not enough to run all the cool community-made features at once. So, I designed a tiny flex PCB “implant” that lets me replace the stock chip with an STM32G0C1CET (512 kB flash, 144 kB RAM). It involved a lot of signal remapping, flex board experiments, and of course plenty of solder fumes....but in the end it worked! submitted by /u/Accomplished-Pen8638 [link] [comments]

As multi-die and chiplet-based systems gain traction in AI, mobile, automotive, and high-performance computing, traditional simulation methods are hitting performance limits. To address this challenge, Cadence has introduced the Xcelium Distributed Simulation App, designed to accelerate verification workflows and cut down bottlenecks. With speedups of up to 3×, the new solution helps design teams handle complex multi-die systems more efficiently and cost-effectively.

The Xcelium Distributed Simulation App, available within the Xcelium Logic Simulator, partitions large simulations into smaller, independent tasks that can run in parallel across server resources. This distributed approach eliminates the long runtimes associated with monolithic simulations, enabling teams to achieve faster turnaround times without compromising accuracy.

Key advantages include:

• Up to 3× faster performance in multi-die system simulations.
• Improved hardware efficiency, reducing compute costs by as much as 5×.
• Seamless testbench reuse, so teams can extend single-die verification environments to multi-die projects with minimal overhead.

Early adopters are already seeing results. At Samsung Semiconductor, Garima Srivastava’s verification team reports smoother workflows and faster execution by leveraging existing testbenches for multi-die designs.

Alok Jain, Corporate VP of R&D at Cadence, emphasized the impact:

“With the Xcelium Distributed Simulation App, we are redefining verification performance for multi-die systems. It’s about giving our customers the speed and scalability they need to meet next-generation design demands.”

This new capability reinforces Cadence’s leadership in advanced verification, helping customers stay ahead as the industry shifts to larger, more complex architectures.

(This article has been adapted and modified from content on Cadence Design Systems.)

The post Xcelium Distributed Simulation Delivers Up to 3× Faster Multi-Die Verification appeared first on ELE Times.

As artificial intelligence infrastructure scales at breakneck speed, outdated assumptions about networking continue to circulate. Many of these myths stem from technologies designed for much smaller clusters, but the game has changed. Today’s AI systems are pushing into hundreds of thousands and soon, millions of GPUs. Old models simply don’t hold up.

Let’s take a closer look at the most persistent misconceptions about AI networking and why Ethernet has clearly established itself as the foundation for modern large-scale training and inference.

Myth #1: Ethernet Can’t Deliver High-Performance AI Networking

This one’s already been disproven. Ethernet is now the standard for AI at scale. Nearly all of the world’s largest GPU clusters built in the past year use Ethernet for scale-out networking.

Why? Because Ethernet now rivals and often outperforms alternatives like InfiniBand, while offering a stronger ecosystem, vendor diversity, and faster innovation. InfiniBand wasn’t designed for the extreme scale we see today; Ethernet is thriving with 51.2T switches in production and Broadcom’s new 102.4T Tomahawk 6 setting the pace. Massive clusters of 100K GPUs and beyond are already running on Ethernet.

Myth #2: You Need Separate Networks for Scale-Up and Scale-Out

That was true when GPU nodes were tiny. Legacy scale-up designs worked when you were connecting two or four GPUs. But today’s architectures often include 64, 128, or more GPUs within a single domain.

Using separate networks adds complexity and cost. Ethernet allows you to unify scale-up and scale-out on the same fabric, simplifying operations and enabling interface fungibility. To accelerate this convergence, we introduced the Scale-Up Ethernet (SUE) framework to the Open Compute Project, moving the industry toward a single AI networking standard.

Myth #3: Proprietary Interconnects and Exotic Optics Are Essential

Not anymore. Proprietary approaches may have fit older, fixed systems, but modern AI requires flexibility and openness.

Ethernet provides a broad set of choices: third-gen co-packaged optics (CPO), module-based retimed optics, linear drive optics, and long-reach passive copper. This flexibility lets you optimize for performance, power, and economics without being locked into a single path.

Myth #4: Proprietary NIC Features Are Required for AI Workloads

Some AI clusters lean on programmable, high-power NICs for features like congestion control. But often, that’s compensating for a weaker switching fabric.

Modern Ethernet switches, including Tomahawk 5 and 6, already embed advanced load balancing, telemetry, and resiliency — reducing cost and power draw while leaving more resources available for GPUs and XPUs. Looking ahead, NIC functions will increasingly integrate into XPUs themselves, reinforcing the strategy of simplifying rather than over-engineering.

Myth #5: Your Network Must Match Your GPU Vendor

There’s no reason to tie your network to your GPU supplier. The largest hyperscaler deployments worldwide are built on Ethernet.

Ethernet enables flatter, more efficient topologies, supports workload-specific tuning, and is fully vendor-neutral. With its standards-based ecosystem, AI clusters can scale independently of GPU/XPU choice-ensuring openness, efficiency, and long-term scalability.

The Takeaway:

Networking is no longer a side note; it’s a core driver of AI performance, efficiency, and growth. If your assumptions are rooted in five-year-old architectures, it’s time to update your playbook.

The reality is clear: the future of AI networking is Ethernet and that future is already here.

(This article has been adapted and modified from content on Broadcom.)

The post Rethinking AI Networking: Myths vs. Reality appeared first on ELE Times.

A new addition to Cadence's Reality Digital Twin platform library aims to speed the design and deployment of large AI data centers.

Kickstarter project Stamp aims to eliminate crowded breadboards using universal modular breakout PCBs.

Many recent Design Ideas have involved button-pushing to control power. Some may have been more resistant to contact-bounce than others—but how can we really check that? This DI describes how some simple circuitry can simulate bouncy contacts, and do so controllably and repeatably, thus allowing an objective measure of how well the debouncing works.

Wow the engineering world with your unique design: Design Ideas Submission Guide

Other solutions are available! Capturing the bounces from a real switch and then replaying them at varying rates is one approach, and SPICE models are apparently available. I’ve not played with the latter, but trust that its developers had fun simulating some truly evil conditions.

Genuine contact noise is inherently random and often very spiky. This device, shown in detail in Figure 1, uses bursts of well-defined pulses instead. If your debouncing circuitry or code can handle those, real-world operation is pretty much guaranteed. Because these pulses are grouped in bursts and are repeatable, the guard time can easily be measured. Hook this across the (normally-open) contacts whose debouncing you need to check, and vary the burst duration until your system misbehaves.

Push switches vary a lot, as some quick tests revealed. Clicky tact(ile) ones showed little or even no bounce when closing. A cheap doorbell push was, putting it politely, somewhat worse, though admittedly it was intended to switch a contact-cleaning amp or so. While most were noisier when opening than closing, they were generally stable within 20 ms (doorbell button excepted), so the span of 100 µs to 100 ms should be adequate for testing.

Figure 1 This contact-bounce simulator generates brief bursts of pulses when the Run button is either pressed or released, the burst durations ranging from about 100 µs to 100 ms. The optocoupler provides an isolated output that can pull up or down as needed.

Until the Run button is pressed, oscillator U1a is inhibited and the circuit is static, so no power is drawn—nanoamp leakages excepted—and the output is open circuit. Pressing Run enables the oscillator. After a brief delay (C1/R2) to mask the initial clock edge, it also clears U2a’s reset, allowing U2a to count up to 8 and then freeze or dead-end itself. Pulses from its Q1 are indirectly fed to the optocoupler OCI1 to simulate the “making” bounces, followed by a steady level from Q4 once the switch is deemed to be properly closed. U2b is inactive during this sequence. Figure 2 shows the various waveforms.

What’s pushed down must come up

When Run is released, C2 and R3 ensure that the oscillator still operates for ~200 ms. U2a is reset, clearing the steady “on” condition and allowing U2b to count up while its Q1 delivers the “breaking” bounces. Finally, U2b freezes, and everything can turn off, ready for the next test cycle.

D2–4 and R6 OR the pulses and the steady level. The first attempt used a 74HC02 (quad NOR) to do that, but there were so many odd gates left over that it all just looked unhappy. Employing diode logic plus the spare U1 gates for buffering cured that.

Figure 2 A composite of waveforms from the circuit of Figure 1, with some notes on its operation.

This view of the waveforms exposes a slight hiccup! Note how the making and breaking sequences differ, with the latter starting at an arbitrary point on the clock, giving an extra pulse or part thereof. Adding more logic could have cured that by synchronizing U2a’s reset with the clock, but while more elegant ’scope-wise, it had no practical advantage. Anyway, as we saw above, many buttons are electrically noisier when their contacts are opening.

An easy way out, and a harder one

Now that we have the bursts, we need to make them look like actual switch closures. The simplest and generally best way is to drive them into the LED of an optocoupler, as shown in Figure 1. Its transistor is the output switch, which can pull up or down as required. Its effective resistance may be significant; an (obsolete) FCD820 driven with ~7 mA looked like ~500 Ω.

That’s fine for logic-level applications, but if more grunt is needed, MOSFETs are better because they conduct much harder. Figure 3 shows some add-on variants ranging from simple pull-down and pull-up/pull-down circuits—both non-isolated—to a fully isolated arrangement. Note the necessary power and ground feeds from the target. The devices shown are good for 60 V, a few ohms, and moderate currents.

Figure 3 MOSFETs can be used to switch the output with much less “contact resistance.” This shows three ways of doing that, with both isolated and non-isolated outputs.

Isolating the output with a reed relay is a non-starter. They take several milliseconds to respond, which is slower than we need, and chatter badly (mercury-wetted ones excepted). On a positive note, this gadget can easily simulate them, at least for simple makes or breaks: replace the Run button with a suitably-driven OCI.

A digression and a rant

Why do many single-function buttons refuse to do anything useful until they are released? With multi-function ones—perhaps intended to distinguish between short presses, long ones, and being inadvertently sat on—it makes good sense, but when there are no other options, it’s irrational. Once a switch has been seen as valid for long enough, it should be treated as such. I can’t be alone in having an almost instinctive reaction to delayed results: either “Ooh—there must be other options” or “Arggh—it’s broken”, neither of which is usually true or helpful.

Though I did accidentally find the (undocumented) subtitles’ control on the remote for my new TV by holding the mute button down for too long. According to said documentation, that function was inaccessibly buried—in the Accessibility Menu. Buttons often seem to be seen as trivial afterthoughts, but when they are part of a user interface, they need to be implemented (and debounced) with subtlety and care. And properly documented for the user. End of rant.

—Nick Cornford built his first crystal set at 10, and since then has designed professional audio equipment, many datacomm products, and technical security kit. He has at last retired. Mostly. Sort of.

Related Content

• To press on or hold off? This does both.
• Push ON, Push OFF for AC voltages
• A different twist to the power pushbutton problem: A kilowatt AC DAC
• Flip ON flop OFF
• Another simple flip ON flop OFF circuit
• Flip ON flop OFF without a flip/flop
• Elaborations of yet another Flip-On Flop-Off circuit
• Latching D-type CMOS power switch: A “Flip ON Flop OFF” alternative
• Another simple flip ON flop OFF circuit
• Latching power switch uses momentary pushbutton

The post Fake contacts, bounced to order appeared first on EDN.

A cadence sensor is a compact cycling device that measures your pedaling rate in revolutions per minute (RPM), providing real-time feedback to help optimize performance and training efficiency. Here is a hands-on guide to the core principles behind pedal rotation tracking, along with practical setup tips for bikes and DIY projects. It provides clear explanations and actionable insights to get your cadence sensor up and running with confidence.

Read the full article at EDN’s sister publication, Planet Analog.

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• World’s first Bluetooth low energy bike speed and cadence monitor is released

The post The fundamentals of cadence sensing for pedal rotation tracking appeared first on EDN.

A client approached me because their system suddenly stopped working.The system was designed by someone else and had been working fine for years. After carefully studying the schematics, checking power supply, and measuring continuity with a multimeter, I spent hours debugging the issue. After hours of thorough debugging, I found the root cause: * 1 resistor was open * 1 capacitor had wrong polarity Replaced both. System came back to life. Minimal cost. Maximum satisfaction. 😊 https://www.linkedin.com/posts/pournima-choulwar-5a1b98220_embeddedsystems-iot-hardwaredebugging-activity-7373192591435087872-h5kj?utm_source=share&utm_medium=member_desktop&rcm=ACoAADe0VkkBj8YEaQG6Xut_N5ndwX9H6ADxDb8 submitted by /u/Ill-Interview6555 [link] [comments]

Electronics and automobile manufacturers, contributing 3% and 7.1% to India’s GDP respectively, are at the heart of the nation’s industrial growth. Yet, their progress is often slowed by a maze of compliance requirements from evolving labour codes and plant safety regulations to environmental certifications and state-specific laws. For many players, these overlapping obligations translate into delays, operational inefficiencies, and missed opportunities to scale.

To understand how compliance challenges are shaping the future of these sectors, and how technology like AI and RPA is redefining compliance management, ELE Times spoke with Munab Ali Beik, Head of Compliance Advisory at Core Integra. With over 20 years of experience navigating regulatory frameworks and driving digital compliance transformations, he provides deep insights into the hurdles manufacturers face, the reforms needed to unlock growth, and how smart compliance practices can strengthen India’s position as a global manufacturing hub.

Excerpts from the interview:

ELE Times: What are the most complex compliance requirements currently troubling electronics and automobile manufacturers in India?

Munab Ali Beik: For electronics and automobile manufacturers, the most complex compliance challenges today revolve around evolving labour laws, contractor & supplier compliances, shop floor regulations, health and safety requirements, unions and employee welfare norms. With the introduction of upcoming new labour codes, companies must realign HR policies, wage structures, obtaining registrations and working hours while maintaining strict adherence to health and safety standards. Shop floor compliance has become increasingly demanding, requiring detailed SOPs, audits, and documentation to manage risks associated with heavy machinery. Beyond this, manufacturers face intricate requirements around plant certifications, environmental regulations, product safety standards, certifications, audits and overall labour law compliance. Studies indicate that nearly 45–50% of players’ experience delays and operational inefficiencies due to these overlapping regulatory demands, highlighting the critical need for proactive compliance management.

ELE Times: Why do almost half of manufacturers experience delays specifically due to compliance hurdles?

Munab Ali Beik: The delay is due to compliance hurdles because the regulatory landscape remains highly complex and fragmented. Frequent updates to labour laws and enterprise laws require constant adjustments, while machinery safety norms and employee welfare provisions add operational challenges. For companies operating multiple plants, the lack of uniformity across states further complicates compliance, state-specific laws, local regulatory requirements, and varying environmental norms necessitate separate processes and documentation. States have indicated that the Ease of Doing Business initiative may complicate the procedural implementations and understanding the simplified part of compliances. This patchwork of regulations, combined with limited coordination across jurisdictions, creates bottlenecks and inefficiencies, slowing operations and impacting manufacturers’ ability to scale effectively.

ELE Times: With electronics contributing 3% and automobiles 7.1% to India’s GDP, do you think regulatory overload is limiting their full growth potential?

Munab Ali Beik: Yes, absolutely. If compliance hurdles were streamlined, electronics and automobile manufacturers could devote far more resources to R&D, innovation, and building global competitiveness. These sectors have the potential to not only sustain but significantly increase their contribution to India’s GDP by boosting exports, enhancing localization, and developing advanced manufacturing ecosystems. Procedural bottlenecks currently divert focus from scaling production, investing in cutting-edge technologies, and optimizing supply chains. While India is making strides in improving ease of doing business, attracting larger foreign investments and sustaining growth requires simpler and more stable compliance frameworks. The central and state governments are set to relax certain provisions for the electronics and automobile manufacturing sectors to improve their performance. These relaxations pertain to auto-renewals, inspections, self-certifications, working hours, overtime, industrial disputes, subsidies, and promotional activities. Reducing regulatory overload would enable these industries to strengthen core operations, accelerate India’s emergence as a global manufacturing hub, and unlock untapped economic potential.

ELE Times: How can AI and RPA truly transform compliance management for manufacturing plants?

Munab Ali Beik: AI and RPA can revolutionize compliance management in manufacturing by automating repetitive tasks like payroll, attendance tracking, statutory filings, registers maintenance, returns filing, maintaining the data, Management information system and audit reporting. AI platforms provide real-time visibility, flag risks, and update changes in regulations automatically, while RPA ensures consistent workflows across HR, finance, and operations. This reduces errors, boosts efficiency, and frees management to focus on strategic priorities. Over time, digital compliance not only cuts costs, increase the efficiency, error free and improves safety monitoring but also strengthens governance and investor confidence.

ELE Times: What critical changes are required to make India a global manufacturing hub for electronics and automobiles?

Munab Ali Beik: To position India as a global manufacturing hub for electronics and automobiles, critical changes are needed in regulatory stability, ease of doing business, exemption from regulatory frameworks and policy clarity. Simplifying access to government schemes, enhancing transparency in labour laws, and streamlining compliance processes will reduce operational friction and build investor confidence. These measures will enable manufacturers to focus on innovation, scale efficiently, and compete globally, driving both domestic growth and export potential.

ELE Times: How is Core Integra evolving its AI/RPA tools to stay aligned with future compliance expectations?

Munab Ali Beik: We are continuously enhancing our AI and RPA capabilities through our compliance platform, Ctrl F, to stay ahead of evolving regulatory requirements. We leverage AI to track changing laws in real time, identify the impacts, flag risks, and automate documentation, filings, and reporting. By integrating RPA, we ensure consistency across multi-location operations, reduce manual errors, simplified the process and minimize administrative burdens. Alongside technology, we invest in R&D and advisory expertise to simplify complex regulations and provide proactive compliance updates. These innovations empower our clients to manage compliance efficiently, enhance operational oversight, and focus resources on scaling and innovation.

The post Why Electronics and Auto Manufacturers Struggle with Compliance in India appeared first on ELE Times.

Artificial intelligence is no longer some faraway notion; it has become a strong and immediate agent of innovation. Whether in predictive analytics or generative design, AI remains instrumental in the means by which OEMs and ISVs conceive, produce, and maintain their products. However, promising this technology is, majority of companies cannot speed away from experimentation into value-driven and large-scale application.

This guide demystifies the AI technologies reshaping the industry, illuminates their real-world applications, and lays down a commercially viable roadmap for OEMs and ISVs to embrace AI with confidence and clarity.

Understanding Artificial Intelligence

AI refers to the development of computer systems capable of performing tasks traditionally requiring human intelligence. These systems process vast amounts of data, recognize patterns, and make decisions with minimal human intervention. AI spans a wide spectrum from rule-based automation to advanced deep learning algorithms capable of generating content, interpreting speech, and predicting outcomes.

While AI has existed for decades, the surge in computational power, cloud infrastructure, and data availability has accelerated adoption across industries. Today, AI is no longer optional it is an essential enabler for companies striving to remain innovative and competitive.

The Different Types of AI:

Natural Language Processing (NLP)

NLP enables machines to understand, interpret, and generate human language. It powers chatbots, virtual assistants, translation tools, and sentiment analysis systems. OEMs and ISVs are integrating NLP into products to create voice-enabled interfaces, enhance customer engagement, and extract insights from unstructured data such as emails, reviews, and social media.

Machine Learning and Predictive Analytics

Machine Learning (ML) allows systems to learn patterns from data and make predictions without explicit programming. Predictive analytics, a major ML application, helps anticipate trends, detect anomalies, and optimize operations. For instance, predictive maintenance reduces downtime by forecasting equipment failures, while cybersecurity solutions use ML to detect threats in real-time.

Generative AI

Generative AI is the next frontier. Unlike traditional ML, it creates new content—ranging from text and images to design prototypes. For OEMs and ISVs, this translates into automated documentation, rapid product prototyping, and personalized customer experiences. Generative AI not only streamlines workflows but also fosters creativity and innovation.

Addressing the Challenges of AI Adoption:

Despite its potential, AI adoption comes with hurdles-

Bias and Fairness: AI models trained on biased datasets risk producing unfair or inaccurate outcomes. Businesses must prioritize transparency and accountability in AI systems.

Integration Complexity: Legacy infrastructure, siloed data, and fragmented workflows often complicate AI integration.

Data Security and Privacy: AI systems process sensitive business and customer information, making strong data governance and compliance with privacy regulations critical.

Continuous Adaptation: AI models require constant monitoring, retraining, and refinement to remain accurate in dynamic business environments.

Deploying AI Strategically for OEMs and ISVs:

To move beyond pilots and achieve scalable impact, businesses should approach AI strategically:

1. Align AI with Business Goals – Identify specific areas where AI can enhance value, such as automation, customer engagement, or operational efficiency.
2. Ensure Data Readiness – High-quality, structured data is the backbone of AI success. Companies must invest in robust data collection and management systems.
3. Leverage Cloud and AI-as-a-Service – Cloud-based platforms lower barriers to entry by offering scalable AI tools without requiring deep in-house expertise.
4. Collaborate with AI Experts – Partnering with specialized providers accelerates adoption and optimizes solutions for industry-specific needs.
5. Commit to Continuous Improvement – Regularly monitor performance, retrain models, and evolve AI capabilities alongside business needs.

The Future of AI in Business:

AI’s evolution is accelerating. Explainable AI (XAI) is enhancing transparency, allowing businesses to understand and trust AI-driven decisions. Edge AI is bringing intelligence closer to data sources, enabling real-time decision-making in IoT and remote deployments. Together, these innovations are making AI more practical, ethical, and impactful.

For OEMs and ISVs, investing in AI today is not just about keeping pace it’s about leading the transformation. Those who strategically integrate AI will unlock new opportunities in product development, customer engagement, and operational efficiency, securing a decisive competitive edge.

Conclusion:

AI is no longer experimental it is a strategic imperative. From NLP-driven customer engagement to predictive maintenance and generative design, the opportunities for OEMs and ISVs are vast. By aligning AI adoption with business goals, addressing data and integration challenges, and committing to continuous refinement, companies can unlock the full potential of AI.

(This article has been adapted and modified from content on Arrow Electronics.)

The post Unlocking the Power of AI: A Strategic Guide for OEMs and ISVs appeared first on ELE Times.

• Marking the event’s biggest international participation to date, the edition brings together 6,000+ global brands from over 50 countries, featuring pavilions from Germany, Japan, Taiwan, and more.
• A dynamic meeting ground for collaboration and innovation spanning Start-Up and SME zones, conferences, podcasts, forums, and buyer–seller programs.
• Cricket icon Rohit Sharma leads the campaign, embodying India’s spirit of innovation, teamwork, and emerging global leadership in electronics.

India is steadily strengthening its position in the global electronics landscape, moving from being a participant to becoming a key driver of innovation and manufacturing. This momentum comes to life at the co-located trade fairs, electronica India and productronica India, returning to the Bangalore International Exhibition Centre (BIEC) from 17–19 September 2025.

This year’s edition reflects the scale of India’s electronics growth journey. Spread across 60,000 square meters, the fairs will feature 6,000+ global brands and participation from 50+ countries. From semiconductor design and embedded systems to electronic components and production technologies, the platform will spotlight innovations driving electric mobility, smart displays, and Industry 4.0, reinforcing India’s growing role in global electronics manufacturing.

In a move that links national pride with technological prowess, cricket icon Rohit Sharma has been named the face of the event, embodying the theme, “India’s Powerplay in Electronics.” It’s a fitting analogy Sharma’s leadership, innovation, and teamwork on the field resonate with the very ethos driving India’s electronics sector.

Bhupinder Singh, President IMEA, Messe München and CEO, Messe Muenchen India, said:

“These trade fairs underscore India’s global ambitions in electronics manufacturing. This year marks a record international participation for the event, with representation from over 50 countries and dedicated pavilions from Germany, Japan, Taiwan, and more. The platform brings together industry leaders, policymakers, and innovators to advance design-led innovation and modern manufacturing. With Rohit Sharma as the face of this edition, they embody the scale, energy, and vision driving India’s Powerplay in Electronics.”

Dr. Reinhard Pfeiffer, CEO of Messe München, added:

“The significance of these trade fairs lies in uniting every layer of the electronics ecosystem from global industry leaders to agile startups, from government stakeholders to academia. Hosting this convergence in Bengaluru underscores India’s fast rise as a key technology hub and its growing influence on global innovation trends. For Messe München, this edition represents a milestone in our mission to foster cross-border collaboration and create a truly global platform for innovation and growth.”

The event’s gravitas is underscored by powerful alliances with Government of Karnataka as State Partner and support from premier industry associations including the Electronic Industries Association of India (ELCINA), India Cellular & Electronics Association (ICEA), Electronics City Association ofIndia (ELCIA), Consortium of Electronic Industries in Karnataka (CLIK), Taiwan Printed Circuits Association (TPCA), Korea Printed Circuits Association (KPCA) and Global Industry Association (GEA) other association names.

Rajoo Goel, Secretary General of ELCINA, underscores:

“What excites us is the balance between today’s opportunities and tomorrow’s vision. With pioneering start-ups, global pavilions, semiconductor design focus, extensive representation of components and materials value chain as well as buyers and sellers converging, these trade fairs reflect the fast maturity of our industry. ELCINA is proud to partner in building an ecosystem where policy, innovation, and collaboration come together and where India’s electronics manufacturing is stepping into genuine global leadership.”

At the heart of this year’s buzz are 18 pioneering start-ups, backed by the Government of Karnataka and Startup Karnataka, unveiling breakthrough innovations across the electronics value chain and highlighting India’s deep-tech and semiconductor strength. Adding momentum, the India Semiconductor Conclave will convene global leaders and policymakers to drive India’s design-led chipmaking ambitions onto the world stage.

Karnataka Innovation and Technology Society expressed pride in supporting electronica India and productronica India 2025 in Bengaluru. This support underscores Karnataka’s commitment to advancing a design-led and manufacturing-led future in electronics and semiconductors. By fostering innovation, attracting global investments, and empowering start-ups, the state continues to create an environment where technology thrives, talent flourishes, and India strengthens its position as a global leader in electronics. electronica India and productronica India 2025 will go beyond traditional displays with:

• Innovation Forum – spotlighting breakthrough ideas in sustainability, Japanese tech trends, asset tracking, e-tolling, and future navigation.
• Buyer–Seller Forum – driving 2,000+ structured meetings with procurement leaders from Honda, Pricol, BHEL, BEL, Lava, Foxconn, and more across PSUs, automotive, consumer electronics, mobility, and industrial sectors.
• Industry-led Conferences – a series of focused forums including the CEO Forum, eFuture, eMobility, Capital Goods & Automation, India PCB Tech, and the India Semiconductor Conclave.
• Live Podcast Series – featuring conversations with industry thought leaders and innovators, adding dialogue to the show floor.

Together, these programmes blend demonstration, deal-making, and dialogue—underscoring India’s Powerplay in Electronics as it ignites Bengaluru.

The post Electronica India and productronica India 2025: India’s Powerplay in Electronics, set to propel the future of electronics manufacturing appeared first on ELE Times.

The power electronics sector is set to start a final stage of growth as it is expected to have an evaluated market value of USD 51.73 billion by 2025, reaching USD 67.42 billion by 2030. A steady CAGR of 5.4% stems from a steady increase in demand for energy efficiency, renewable integration, and semiconductor advanced technology.

The Growth Drivers:

The positive momentum of the market is born out of interlinked phenomena:

Clean Energy Imperative

As the world tries to go carbon-neutral, renewable energy systems, including solar photovoltaic and wind farms, go mainstream. Power electronics, hence, are used in these systems to enable efficient energy conversion, grid integration, and real-time management.

Electrification of Transport

With EVs and HEVs no longer considered niche, the demand is now rising for high-performance inverters, converters, and battery-management systems. The transition is fueled by policy, consumer interest, and vehicle-electrification technology advances.

Semiconductor Innovations

Wide-bandgap materials such as silicon carbide (SiC) and gallium nitride (GaN) are reshaping design possibilities. These materials enable devices that are smaller, faster, more efficient, and capable of operating at higher temperatures making them invaluable for modern automotive, industrial, and renewable applications.

Smart Infrastructure and Connectivity

With the development of smart grids, connected mobility, and smart manufacturing, there is a greater demand for the precision operation of power. Power electronics underpin these systems to foster efficiency, safety, and interoperability.

Though on a positive trending path, the sector faces engineering challenges, chiefly in the design and packaging of SiC devices, which mandate careful thermal and structural management.

Market Segmentation Insights:

Automotive & Transportation: Fastest Growing Segment

This industry segment shall witness the highest CAGR during the forecast period. Vehicle electrification, growing ADAS features, integration of infotainment systems require advanced power electronics focusing on efficiency and reliability, which are only further underlined with the march toward autonomous and connected vehicles.

Power ICs: Market Leader

Power ICs will maintain their position as the largest share commanded due to their extensive uses in consumer electronics like smartphones, laptops, and tablets; industrial and automotive applications. They become vital for reducing energy loss, extending battery life, ensuring high performance, and reliability of systems.

Regional Insights:

Asia-Pacific region is considered to be the center of the global market and hence is projected to remain dominant. The key drivers behind its domination are:

Percentagewise: Strong power electronics manufacturing systems in China, Japan, South Korea, and Taiwan.

Rapid urbanization and industrialization in emerging economies such as India, Vietnam, and Indonesia.

Generous government aids for the adoption of EVs and the deployment of renewable energy.

Asia Pacific then stands as a global supplier and a major consumer of power electronics, given the establishment of an industrial base and growing domestic demand.

Industry Panorama:

The market consists of well-established technology giants as well as specialized players. Major companies include Infineon Technologies AG, Texas Instruments Incorporated, ON Semiconductor, STMicroelectronics, Analog Devices, Inc., Mitsubishi Electric Corporation, Renesas Electronics Corporation, Toshiba Corporation, Fuji Electric Co., Ltd., and Vishay Intertechnology, Inc.

Such firms intend to strengthen their market positions with product innovations, partnerships, acquisitions, and increased capacity. Investing heavily in R&D with special emphasis on SiC and GaN technologies, they are shaping the next generation of energy efficient systems.

Future Outlook:

Power electronics’ contribution to a cleaner, smarter, and more connected society will define the market by 2030. The industry is situated at the nexus of technological innovation and energy change, powering everything from electric vehicles to regulating renewable energy flows and supporting the gadgets we use on a daily basis.

In this situation, businesses that can expand production, overcome material constraints, and innovate for efficiency will not only prosper but also establish the standards for a sustainable electronics future.

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