ELE Times

Anritsu Corporation announced that its receiver test (SINK Test) solution for the latest DisplayPort 2.1 standard has been certified by the Video Electronics Standards Association (VESA), the international standards organization. Combining Anritsu’s Signal Quality Analyzer-R MP1900A with automation software from Granite River Labs (GRL) or Teledyne LeCroy achieves automated verification of data transmission quality and calibration.

DisplayPort 2.1 enables the digital transmission of high-definition and high-refresh-rate video, such as 8K. The standard is still being developed. Recently, the integration of the USB Type-C specifications has led to a significant expansion in the versatility of DisplayPort 2.1 and its adoption across a wide range of applications. However, a challenge facing the development of products that comply with the new standard is that manually verifying transmission signal quality and calibrating are time-consuming due to the complexity of the test equipment settings and the lengthy configuration and test procedures. This solution improves development efficiency and ensures the quality of video data transmission by automating the testing and calibration processes.

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Infineon Technologies AG is expanding its offering for universal serial bus (USB) tokens, dongles, security keys, and other hardware authenticators with the introduction of the new Infineon ID Key family. The newest member, the ID Key S USB is a highly secured and versatile product designed for a wide range of USB- and USB/NFC-token devices and applications. It combines the security, performance, and reliability of the Infineon SLC38 security controller with a USB bridge controller in one single package. It is a unique system-in-package solution that enables high flexibility and simplifies complex application deployments while reducing the bill of materials and related costs. Certified to highest security levels, it supports a range of use cases, including certificate-based authentication, Fast Identity Online (FIDO) authentication with device-bound passkeys, digital signatures, encryption, access control, software protection, and cryptocurrency hardware wallets.

The increasing need for secured online transactions and the growing threat of cyber-attacks have created a surge in demand for secured and hardware-backed authentication solutions. “As the market shifts towards more secured and convenient authentication methods, we see a growing trend towards the adoption of advanced security solutions,” said Maurizio Skerlj, Senior Vice President and Product Line Head Authentication & Identity Solutions at Infineon’s Connected Secure Systems Division. “With the ID Key S USB, we are well-positioned to address this trend and provide our customers with a robust solution that meets their needs.”

The ID Key S USB offers a range of key features that support its secured and versatile design and boasts a comprehensive array of features. Its high-performance capabilities are driven by a 32-bit CPU clocked at 100 MHz and a large 24 kB RAM, enabling ultra-fast and secured execution of applications and delivering excellent operating system performance for a wide range of use cases. The device also offers sufficient memory, with non-volatile memory sizes of up to 800 kB providing ample storage for large amounts of data, cryptographic keys, software, and multiple applications. Furthermore, the ID Key S USB has achieved highest security levels, with certification to CC EAL 6+ (high) and compliance with FIPS 140-3 hardware requirements, allowing customers to apply for FIPS 140-3 certification for their product. The ID Key S USB features a compact footprint of 4 x 4 x 0.85 mm, making it ideal for integration into space-critical token devices.

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Texas Instruments (TI) has wrapped up the fourth edition of its month-long Women in Semiconductors and Hardware (WiSH) program. WiSH is TI’s flagship mentorship initiative aimed at inspiring and empowering second-year female engineering students across India to pursue impactful careers in core engineering, with a focus on semiconductors and hardware. Built on the previous three editions’ success, the 2025 program attracted over 1,500 registrations and more than 190 participants, reflecting a growing interest in the initiative over the years.

“The semiconductor industry is evolving rapidly, and the need for skilled talent is greater than ever,” said Santhosh Kumar, Managing Director, Texas Instruments India. “With women representing less than 20% of the people in the technical roles in the industry the WiSH program expands access, builds confidence, and fosters engineering capabilities among aspiring women engineers in India. By investing in this next generation of talent, we are helping shape a stronger semiconductor ecosystem.”

This year’s WiSH program participants gained hands-on experience through simulation projects, lab visits, technical deep dives, and networking sessions with TI leaders. The program included three weeks of virtual mentoring, culminating in an immersive, in-person week at TI’s Bengaluru campus. During this phase, students engaged directly with mentors, industry experts, and women leaders from TI.

“The WiSH program provided me the right platform to go beyond classroom learning. We had access to labs where we gained hands-on experience in simulation and circuit design,” said Poornima Kulkarni, Analog Engineer at TI India and a previous WiSH participant. “What makes it unique is the mentorship by subject matter experts to guide aspiring engineers through the course of the program.”

Texas Instruments remains committed to fostering diversity and inclusion within the technology sector. Through initiatives such as WiSH, TI helps to bridge the gender gap in STEM fields and empower the next generation of engineers to lead and innovate in the semiconductor industry.

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Following the resounding success of the Pune and Ahmedabad sessions, Mouser Electronics, Inc., the industry’s leading New Product Introduction (NPI) distributor with the widest selection of semiconductors and electronic components, is geared-up to continue the 6th edition of its India Technical Roadshow with upcoming stops in Chennai on July 11 and Bengaluru on July 17, 2025.

The roadshow serves as a platform for design engineers, technology leaders, FAEs, OEMs, EMS professionals and ecosystem enablers to engage with emerging developments in IoT through in-depth technical sessions, live demonstrations, and valuable networking. Our technology partners – Analog Devices, Littelfuse, Molex, Phoenix Contact, Samtec, Silicon Labs, Taiyo Yuden, Bel Fuse and Würth Elektronik  showcase their newest innovations and solutions to support next-generation electronic design at the India Technical Roadshow.

“We are thrilled by the energy and enthusiasm we have experienced at the India Technical Roadshow in the past years,” said Daphne Tien, Vice President of Marketing and Business Development for Mouser APAC. “India’s technology ecosystem is evolving rapidly, and this roadshow reflects our commitment to supporting that momentum. With tailored themes and practical sessions, our aim is to deliver knowledge that truly resonates with local engineers and empowers them to turn ideas into impactful innovations.”

The Chennai event, to be held at Hyatt Regency, will focus on smart manufacturing. Participants will explore strategies to future-proof factory floors using edge computing, industrial machine vision, advanced automation, and intelligent communication protocols that enhance efficiency and reliability.

India Technical Roadshow at the Taj, MG Road, Bengaluru, will bring the series to a close with a deep dive into rugged electronics. The sessions will delve into design principles for building high-resilience systems suited for harsh environments, with insights into thermal management, shock resistance, and standards-compliant design, including MIL-STD and IP-rated components.

Mouser Electronics provides comprehensive design support through its vast technical resource library on engineering topics that will shape the future. You can access exclusive technical information through our Empowering Innovation Together series, eBooks, newsletters and new product emails, and online tools to accelerate your project.

As a global authorized distributor, Mouser offers the widest selection of the newest semiconductors, electronic components and industrial automation products. Mouser’s customers can expect 100% certified, genuine products that are fully traceable from each of its manufacturer partners. To help speed customers’ designs, Mouser’s website hosts an extensive library of technical resources, including a Technical Resource Center, along with product data sheets, supplier-specific reference designs, application notes, technical design information, engineering tools and other helpful information.

Engineers can stay abreast of today’s exciting product, technology and application news through Mouser’s complimentary e-newsletter. Mouser’s email news and reference subscriptions are customizable to the unique and changing project needs of customers and subscribers. No other distributor gives engineers this much customization and control over the information they receive. Learn about emerging technologies, product trends and more by signing up at https://sub.info.mouser.com/subscriber/.

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Author: STMicroelectronics

Over the past decade, smartphones have evolved far beyond their original purpose, integrating everything from complex applications to higher-quality cameras. Yet with each new capability comes the demand for more power – and with it, the need for more regular recharging. Given the need to be connected to a power socket for charging, it’s usually an act that takes the “mobile” out of mobile phone. 

Several innovations are exploring solutions to this issue of ‘battery drain’. The development of more energy-efficient chips will provide the processing needed for the next generation of app and smartphone capabilities while consuming less energy. Alongside this, advances in energy management chips will more efficiently convert and distribute power within the device. And research into new energy harvesting materials and techniques may, ultimately, see smartphones able to charge themselves.

Advancements in smartphone chip efficiency and power management 

The semiconductor sector continually looks to deliver increased performance while reducing power consumption. Smartphones make use of the most advanced semiconductor process technologies. Today, this typically means sub-5nm node processes, though even smaller process nodes are in development.  In simple terms, smaller nodes mean smaller transistors, which allows greater transistor density in the same area of silicon. This is key to increased performance but also supports improved energy efficiency.  

Several factors support the enhanced energy efficiency and reduced power consumption of the latest generation of smartphone chips. These include shorter interconnects between transistors, lower operating voltages required by smaller transistors, transistor architectures that reduce power leakage (an issue that can increase as process node size decreases), and chips which dynamically adjust power based on device workload. 

Further to the overall advancement of semiconductor process technologies, there has been an emergence of chips specifically designed for power management in devices. Power Management Integrated Circuits (PMICs) – including those from ST – control, allocate, and regulate power delivery within devices and are fundamental in optimizing performance and extending battery life.  As an endorsement of the importance of power management to the smartphone sector, the PMIC for smartphones market, already valued globally at over $6 billion in 2022, is expected to grow to over $10 billion by 2030. 

The PMIC within a smartphone converts power from the battery to the specific voltages needed by components like the CPU, GPU, modem, display, and memory, ensuring that each component receives stable power, crucial for performance and reliability.  The PMIC also controls how power is routed to different subsystems based on usage, potentially cutting off power to unused modules – for instance GPS or Bluetooth – to save energy. The PMIC also manages battery charging itself, protecting the battery from overcharging, overheating, and over-discharging, enhancing battery life.

While improving the energy efficiency of chips and overall power management within devices will help extend battery life, research and development continues in relation to materials that may ultimately remove the need to physically recharge mobile devices entirely. 

The emergence of energy harvesting materials

Piezoelectric materials, which occur both naturally or can be artificially manufactured, generate an electric charge when subject to pressure. Piezoelectric materials themselves aren’t a new discovery. Indeed, anyone who’s owned a quartz wristwatch has benefitted from their natural capabilities. But their potential in smartphones is just being unlocked. 

The pressure applied to a piezoelectric material’s crystal lattice – the structure of atoms in a solid material – causes the atoms to shift slightly, creating an electric charge. This transformation of mechanical force into electricity is known as the piezoelectric effect. Natural piezoelectric materials include, as mentioned, quartz (or silicon dioxide) but also Rochelle salt, topaz and, in biological systems, bone. Many synthetic piezoelectric materials can also be manufactured. 

There are several ways that the electric charge created by physical interaction with piezoelectric materials can be used by smartphones to self-charge. Users simply touching or swiping a screen, pressing device buttons, or even the movement of the smartphone itself in a bag or pocket, can result in an ongoing series of electric charges to extend battery life and reduce the regularity of charging required. 

Light, heat, movement, and even air: the broader potential for energy harvesting

In addition to piezoelectric materials, research continues into how almost every natural resource could be used as an energy source for smartphones.  Innovations in ultrathin, transparent photovoltaic (PV) cells integrated into smartphone screens or back panels show promising potential in the near-term. Thin film PV cells are relatively low cost, have a high level of technology readiness, and can be integrated easily within the case of a smartphone. Additional advantages are that PV cells add negligible weight to a smartphone and have the best energy per volume generation, particularly outdoors. Working in ambient light, PV cells could provide continuous “trickle charging” to mobile devices. 

Similar in some ways to piezoelectric materials, triboelectric energy harvesting uses friction between materials – for instance when swiping a screen – to generate electricity. Rather than electric charge generation being a property of the material itself, triboelectric energy harvesting works more like static electricity, where electrons move between two materials when they are rubbed or moved apart. 

Thermoelectric energy harvesting converts changes in temperature to electricity. Flexible thermoelectric materials might therefore be able to turn an individual’s body heat into electricity and therefore provide passive energy harvesting for a smartphone or mobile device. Again, some “self-winding” wristwatch wearers will be aware of motion-based battery charging, where simply moving while wearing the watch extends the battery life considerably. Similar kinetic energy harvesting could also be used in smartphones, where tiny mechanical generators convert motion – an individual walking or running, or a device being shaken or tilted – into electricity. 

Future micro-electromechanical system (MEMS) may even focus on converting air to energy through air powered micro fuel cells. The process uses oxygen in ambient air in an electromechanical reaction creating electricity. Such fuel cells could, ultimately, become a replacement for lithium-ion batteries in smartphones.

 

Providing power for our primary computing devices

For many, the smartphone has become the primary computing device used to manage their personal and professional lives. The processing power of current and next-generation smartphones is moving towards equality with that of laptop computers.  

With the need to remain as portable as possible, however, this means that the additional performance must be matched with improved energy efficiency and a significant improvement in battery life.  Ultimately, smartphones will use a combination of many of the techniques described above to optimize device performance while harvesting energy to extend battery life, reducing the reliance on regular charging and contributing to a more sustainable ecosystem. The silver screen vision of smartphones and mobile devices that never need charging may still be a way off, but the ability to access peak performance without an anxious search for a power source is within reach.

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• Rural Rising initiative has reached more than 350,000 individuals across Bangarpet and Mulabagilu Taluks
• New Taluk-Level Community Library launched to enhance educational access

Applied Materials India Private Limited in partnership with United Way Bengaluru (UWBe) celebrated a decade of transformative impact in the Kolar district through their flagship initiative, The Rural Rising. This milestone celebrates a journey of growth, sustainable development, and community empowerment that has reached more than 350,000 individuals across 288 villages in Bangarpet and Mulabagilu taluks.

To commemorate the occasion, a Taluk-level community library was inaugurated, reinforcing the initiative’s commitment to educational access and lifelong learning. Avi Avula, Country President of Applied Materials India and Vice President, Semiconductor Products Group, Asia, along with Rajesh Krishnan, CEO, United Way Bengaluru attended the event.

“This milestone is not just a celebration of what we’ve achieved, but a reaffirmation of what’s possible when business, community, and purpose come together”, said Avi Avula. “The Rural Rising initiative has shown us the power of sustained engagement in driving meaningful change”, he added.

A Model for Sustainable Rural Development

Launched in 2015, The Rural Rising initiative was conceived by United Way Bengaluru and implemented by Applied Materials India to address the unique needs of rural communities through a four-pillar approach: education, environment, health, and livelihood. Key achievements over the past decade include:

• Education:
  • 2,299 students mentored and supported through scholarships and enriched learning environments
  • Launch of a new community library to promote literacy and digital access
• Environment:
  • 7 lakes rejuvenated
  • 434 solar-powered streetlights installed
  • 203 tonnes of CO₂ emissions reduced annually
• Livelihoods:
  • 1,170 women, people with disabilities, and rural youth empowered with income-generating skills
  • 561 farmers supported through soil and water conservation programs
  • 8+ community water ATMs installed, benefiting over 4,000 residents
  • Improved sanitation and hygiene infrastructure across villages

“Collaboration is at the heart of the Rural Rising flagship program. By partnering with Applied Materials India, local authorities, and the community, we have made sure that local perspectives are taken into the development process, from planning to implementation. This way, we are helping them take charge of their own progress and build lasting, self-sustaining change in Kolar, said Rajesh Krishnan, CEO of United Way Bengaluru.”

Scaling the Vision Beyond Kolar

Inspired by the success in Kolar, Applied Materials India and UWBe have expanded The Rural Rising to Coimbatore (Tamil Nadu), and Khed Taluk (Pune, Maharashtra). These new chapters will build on the proven model, focusing on education, sports infrastructure, and ecological sustainability. With continued investment and collaboration with local governments, the initiative is poised to scale its impact and enable long-term, community-driven transformation across rural India.

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The rapid advancement of electrification has revolutionized the energy and mobility sectors and provides decisive impulses for industry and society. Power electronics is the indispensable driver of this transformation. With the acquisition of ZES ZIMMER Electronic Systems GmbH, Rohde & Schwarz complements its broad T&M portfolio.

In the constantly changing market environment of the past few decades, ZES ZIMMER Electronic Systems GmbH has managed to achieve continuous growth through innovative solutions and products. The ZES ZIMMER Electronic Systems GmbH portfolio will contribute to expanding the market position of Rohde & Schwarz in the field of power electronics. The family owned company in Hesse with around sixty employees will be fully integrated into the Rohde & Schwarz group. The location will be retained and will continue to be used for power measurement equipment.

For Christina Geßner, Executive Vice President Test & Measurement Division, the acquisition is an important next step that contributes to the sustainable growth strategy of the global technology group: “Both Rohde & Schwarz and ZES ZIMMER Electronic Systems GmbH are privately owned companies with a long tradition. A passion for technology and innovation has always been in the DNA of both our companies. The acquisition will further strengthen our position as a relevant and reliable technology partner for our customers in the field of power measurements, create synergies and generate further growth.”

ZES ZIMMER Electronic Systems GmbH has been an established name in the power measurement market for more than 40 years and not only has a broad customer base but also a strong sales network. The privately-owned company’s exceptionally strong product portfolio supports a wide range of industry-leading use cases and applications, particularly in the electromobility, industrial electronics and renewable energy sectors. The future consolidation and bundling of expertise and portfolios represent a significant expansion of the Test & Measurement Division’s existing offering in the field of power electronics.

Dr. Conrad Zimmer, Managing Partner of ZES ZIMMER Electronics Systems GmbH, says: “Decarbonisation and electrification of various industries will have a major impact on the demand for power electronics and power measurements in the coming decades. A merger with Rohde & Schwarz will allow ZES ZIMMER to make the best use of these growth opportunities. Georg Zimmer founded the company in 1980, and over the last four decades, the employees have built a company with a passion for technology and engineering, whose products are known and appreciated worldwide. I thank our customers for their trust in the company and its products, and all our employees for their dedication and loyalty, and I believe that as a privately-owned company that thinks long term, Rohde & Schwarz will continue the success story of ZES ZIMMER.”

The complete takeover of ZES ZIMMER Electronic Systems GmbH into the Rohde & Schwarz group is an important building block in the long-term growth strategy. At the same time, Rohde & Schwarz is expanding its development capacity with the acquisition and strengthening Germany as an industrial and technological powerhouse.

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Designed for Permanent Contact With Variety of Liquids, AEC-Q200 Qualified Device Eliminates the Need for Costly Wire to Wire Connectors

Vishay Intertechnology, Inc. introduced a new AEC-Q200 qualified NTC immersion thermistor. Featuring a miniature design with a compact sensor tip and thin insulated wire, the Vishay BCcomponents NTCAIMM66H is ideal for the small spaces of liquid-cooled automotive systems, where it provides a fast 1.5 s response time to temperature changes.

The rugged device released consists of a miniature NTC thermistor mounted in a stainless steel 316L housing with lead (Pb)-free brass, and 0.35 mm² AWG#22 insulated lead wires with a FLR2X construction that enables a traction force higher than 30 N. These wires allow for direct crimping with automotive connectors eliminating the need for costly wire to wire connectors while the stainless-steel housing enables permanent contact with water or other liquids.

The NTCAIMM66H will be used for temperature measurement, sensing, and control in liquid-cooled automotive systems such as HEV/EV on-board chargers (OBC) and charging plugs and sockets, in addition to solar heating systems, energy storage systems, industrial drives and tools, and servers. The device can be customized with different cable and stripping lengths, gauges, and conductor plating to meet the need of specific applications, enabling Vishay customers to integrate the thermistor into their complete sensor solutions for HEV / EV thermal management systems (TMS).

The immersion sensor offers resistance at +25 °C (R25) of 10 kΩ, with tolerance of ± 2 %, and beta (B25/85) of 3984 K, with tolerance of ± 0.5 %. The device features maximum power dissipation of 100 mW and an operating temperature range of -40 °C to +125 °C.

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Empowering Secure and Open Compute Infrastructure with Industry-Leading BMC Solutions

Nuvoton Technology Corporation announced that its latest BMC chip revision, NPCM8mnx, has been officially certified under the Open Compute Project (OCP) Security Appliance Framework Enablement (S.A.F.E.) program. This milestone underscores Nuvoton’s commitment to advancing security, transparency, and collaboration within the server and data center industry.

OCP S.A.F.E. certification affirms that Nuvoton’s NPCM8mnx BMC chip meets the highest standards of hardware and firmware security, openness, and supply chain trust. The certification process includes rigorous evaluation against OCP’s secure boot, firmware integrity, and secure recovery requirements, ensuring readiness for hyperscale deployment.

As part of the certification process, Nuvoton completed a comprehensive security audit conducted by NCC Group, an OCP-approved third-party security review provider. The audit validates the robustness of Nuvoton’s security design and implementation. The NPCM8mnx chip integrates a dedicated security enclave called the Trusted Integrated Processor (TIP). The TIP firmware implements Platform Root of Trust (pRoT) functionality and provides a secure foundation for both the BMC and the platform. TIP is provisioned during chip manufacturing by Nuvoton to embed the customer’s Secure Boot keys and a Unique Device Secret (UDS), used by the DICE (Device Identifier Composition Engine) software stack. This built-in trust anchor is key to enabling robust and scalable platform security in modern data center environments.

The OCP S.A.F.E. certification applies to the NPCM8mnx A3 revision of the TIP ROM code and Cryptography Library. This version introduces Post-Quantum Cryptography (PQC) support, including LMS (Leighton-Micali Signatures) verification for Secure Boot. The A3 ROM supports a hybrid signature scheme, combining LMS with the legacy ECDSA-384 to enhance resilience against both classical and quantum attacks during firmware authentication.

In addition to the OCP S.A.F.E. certification, the previous NPCM8mnx A2 chip revision has already achieved FIPS 140-3 certification, including:

• CMVP certificate
• CAVP listing
• Entropy Source Validation (ESV)

“We’re honored to receive OCP S.A.F.E. certification for our NPCM8mnx BMC chip,” said Uri Trichter, VP of Server Products at Nuvoton. “This validates our long-term commitment to empowering open infrastructure with trustworthy, secure, and high-performance silicon. As the ecosystem advances toward zero-trust architecture, Nuvoton is proud to contribute resilient solutions for hyperscale and enterprise deployments.”

Nuvoton is actively working toward FIPS 140-3 certification for the A3 revision as well, continuing its commitment to meeting stringent global security standards.

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cetecom advanced has certified the test solution from Rohde & Schwarz for the verification of the NG eCall functionality. The solution is based on the CMX500 radio communication tester with the NG eCall option, which was specifically developed for the requirements of the IMS-based emergency call system.

NG eCall is the IP Multimedia Subsystem (IMS)-based development of the European eCall system. In contrast to the legacy, circuit-switched technology, NG eCall is based on packet-switched communication over 4G/5G networks. This improves not only speech and data transmission but also provides the foundation for future-proof telematics services.

The test solution from Rohde & Schwarz enables a complete end-to-end simulation of a 4G or 5G network and a Public Safety Answering Point (PSAP). It supports both IMS call setup and IP-based data transmission in accordance with the current 3GPP specifications as well as the CEN standards for NG eCall. The CMX-KA098 option has successfully completed the test scenarios for the PSAP part in accordance with the EN 17240:2024 standard – a crucial step for conformity with European requirements for NG eCall test systems.

cetecom advanced uses the solution for functional tests and protocol conformity tests as well as for the type-approval of In-Vehicle Systems (IVS) that implement NG eCall. The test environment allows for the simulation of real-world mobile network conditions and the emulation of various network scenarios a significant advantage in preparing for certifications or the market launch of new vehicle models.

“The certification of Rohde & Schwarz’ test solution is a major milestone for us,” says Thomas Reschka, Senior Technical Consultant at cetecom advanced. “With this solution, we are technologically well-equipped for the requirements of IMS-based emergency call communication and can support our customers in the development and type-approval of NG eCall systems.”

“The partnership with cetecom advanced allows us to offer innovative test solutions that meet the highest safety standards,” says Christoph Pointner, Senior Vice President Mobile Radio Testers at Rohde & Schwarz. “With our NG eCall test solution, we support automotive manufacturers in developing and implementing life-saving technologies.”

Through this collaboration, both companies aim to empower the automotive industry to ensure the rapid adoption of next-generation vehicle communications that prioritize safety.

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Designed to facilitate the continued evolution of high-frequency wireless systems in various market segments, the new DB0402 3dB 90° hybrid couplers provide repeatable high-frequency performance and continuous power handling in miniature, low-profile form factors compatible with automated assembly.

KYOCERA AVX released a new line of integrated thin film (ITF) hybrid couplers designed to facilitate the continued evolution of high-frequency wireless systems in industrial, automotive, telecommunications, and telemetry applications.

Hybrid couplers are special four-port directional couplers that split input signals into two equal-amplitude 3dB outputs whose phases are shifted by 90°. Many also support performance monitoring and inject signals without interrupting the original signal.

The new DB0402 3dB 90° hybrid couplers from KYOCERA AVX feature field-proven multilayer thin-film technology engineered to provide excellent high-frequency performance in microwave and RF bands spanning 3,000 to 4,100MHz and enable the quick adjustment of RF parameters. They also feature compact, rugged constructions that measure just 0.040” x 0.023” x 0.014” ±0.002” (L x W x H), enabling board space savings, and lead-free nickel terminations compatible with reflow, wave, vapor phase, and manual soldering techniques, enabling reliable automated assembly. Additional benefits include high power handling (1W continuous), low insertion loss (-0.5dB typical, -0.8dB max.), high isolation, exceptional amplitude and phase balance (0.6dB typical, 1.2dB max. and 2° typical, 5° max., respectively), temperature stability, linearity improvements, low parasitics, high part-to-part and lot-to-lot repeatability, excellent solderability, self-alignment during reflow, and effective heat dissipation.

The series is currently available in four frequency bands with typical performance of 3,200, 3,500, and 3,700, and 3,800MHz and is rated for 50Ω impedance and operating temperatures extending from -40°C to +85°C. It’s also compliant with International Automotive Task Force (IATF) and RoHS requirements, manufactured in ISO 9001 facilities, and packaged on tape and reel for automated assembly.

Ideal applications for the series extend throughout the industrial, automotive, telecommunications, and telemetry industries and include base stations, wireless LANs, mobile communications systems, 4G, 5G, and 6G LTE infrastructure, satellite TV receivers, global positioning systems (GPS), RF balanced amplifiers, signal distribution, heavy-duty radios, vehicle location systems, and other high-frequency wireless systems.

“The rapid evolution and expansion of 5G, SATCOM, and other high-frequency wireless technologies is fueling the evolution of enabling technologies, including millimeter wave and MIMO (multiple-input, multiple-output) antennas, which are empowered by innovative microwave and RF components, like our new 3dB, 90° hybrid couplers,” said Mohammed Abu-Naim, RF Product Manager, KYOCERA AVX – North America. “Our new hybrid couplers provide customers with space- and cost-saving solutions for maximizing repeatable, high-frequency RF performance in compact and handheld industrial, automotive, telecommunications, and telemetry applications with high power handling and wide operating frequency requirements.”

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Single- and Dual-Core MCUs Combine Arm Cortex-M85 and M33 Cores with Arm Ethos-U55 NPU to Deliver Superior AI Performance up to 256 GOPs

• Unprecedented 7300+ CoreMarks with Dual Arm CPU coresTSMC 22ULL Process Delivers High Performance and Low Power Consumption
• Embedded MRAM with Faster Write Speeds and Higher Endurance and Retention
• Dedicated Peripherals Optimized for Vision and Voice AI plus Real-Time Analytics
• New AI Software Framework Eases Development and Enables Easy Migration with MPUs
• Leading-Edge Security Features Ensure Data Privacy

Renesas Electronics Corporation introduced the RA8P1 microcontroller (MCU) Group targeted at Artificial Intelligence (AI) and Machine Learning (ML) applications, as well as real-time analytics. The new MCUs establish a new performance level for MCUs by combining 1GHz Arm Cortex-M85 and 250MHz Cortex-M33 CPU cores with the Arm Ethos-U55 Neural Processing Unit (NPU). This combination delivers the highest CPU performance of over 7300 CoreMarks and AI performance of 256 GOPS at 500 MHz.

Designed for Edge/Endpoint AI

The RA8P1 is optimized for edge and endpoint AI applications, using the Ethos-U55 NPU to offload the CPU for compute intensive operations in Convolutional and Recurrent Neural Networks (CNNs and RNNs) to deliver up to 256 MACs per cycle that yield 256 GOPS performance at 500 MHz. The new NPU supports most commonly used networks, including DS-CNN, ResNet, Mobilenet TinyYolo and more. Depending on the neural network used, the Ethos-U55 provides up to 35x more inferences per second than the Cortex-M85 processor on its own.

Advanced Technology

The RA8P1 MCUs are manufactured on the 22ULL (22nm ultra-low leakage) process from TSMC, enabling ultra-high performance with very low power consumption. This process also enables the use of embedded Magnetoresistive RAM (MRAM) in the new MCUs. MRAM offers faster write speeds along with higher endurance and retention compared with Flash.

“There is explosive growth in demand for high-performance edge AIoT applications. We are thrilled to introduce what we believe are the best MCUs to address this trend,” said Daryl Khoo, Vice President of Embedded Processing Marketing Division at Renesas. “The RA8P1 devices showcase our technology and market expertise and highlight the strong partnerships we have built across the industry. Customers are eager to employ these new MCUs in multiple AI applications.”

“The pace of innovation in the age of AI is faster than ever, and new edge use cases demand ever-improving performance and machine learning on-device,” said Paul Williamson, senior vice president and general manager, IoT Line of Business at Arm. “By building on the advanced AI capabilities of the Arm compute platform, Renesas’ RA8P1 MCUs meet the demands of next generation voice and vision applications, helping to scale intelligent, context-aware AI experiences.”

“It is gratifying to see Renesas harness the performance and reliability of TSMC 22ULL embedded MRAM technology to deliver outstanding results for its RA8P1 devices,” said Chien-Hsin Lee, Senior Director of Specialty Technology Business Development at TSMC. “As TSMC continues to advance our embedded non-volatile memory (eNVM) technologies, we look forward to strengthening our long-standing collaboration with Renesas to drive innovation in future groundbreaking devices.”

Robust, Optimized Peripheral Set for AI

Renesas has integrated dedicated peripherals, ample memory and advanced security to address Voice and Vision AI and Real-time Analytics applications. For vision AI, a 16-bit camera interface (CEU) is included that supports sensors up to 5 megapixels, enabling camera and demanding Vision AI applications. A separate MIPI CSI-2 interface offers a low pin-count interface with two lanes, each up to 720Mbps. In addition, multiple audio interfaces including I2S and PDM support microphone inputs for voice AI applications.

The RA8P1 offers both on-chip and external memory options for efficient, low latency neural network processing. The MCU includes 2MB SRAM for storing intermediate activations or graphics framebuffers. 1MB of on-chip MRAM is also available for application code and storage of model weights or graphics assets. High-speed external memory interfaces are available for larger models. SIP options with 4 or 8 MB of external flash in a single package are also available for more demanding AI applications.

New RUHMI Framework

Along with the RA8P1 MCUs, Renesas has introduced RUHMI (Renesas Unified Heterogenous Model Integration), a comprehensive framework for MCUs and MPUs. RUHMI offers efficient AI deployment of the latest neural network models in a framework agnostic manner. It enables model optimization, quantization, graph compilation and conversion, and generates efficient source code. RUHMI provides native support for machine-learning AI frameworks such as TensorFlow Lite, Pytorch & ONNX. It also provides the necessary tools, APIs, code-generator, and runtime needed to deploy a pre-trained neural network, including ready-to-use application examples and models optimized for RA8P1. RUHMI is integrated with Renesas’s own e2 Studio IDE to allow seamless AI development. This integration will facilitate a common development platform for MCUs and MPUs.

Advanced Security Features

The RA8P1 MCUs provide leading-edge security for critical applications. The new Renesas Security IP (RSIP-E50D) includes numerous cryptographic accelerators, including CHACHA20, Ed25519, NIST ECC curves up to 521 bits, enhanced RSA up to 4K, SHA2 and SHA3. In concert with Arm TrustZone, this provides a comprehensive and fully integrated secure element-like functionality. The new MCUs also provides strong hardware Root-of-Trust and Secure Boot with First Stage Bootloader (FSBL) in immutable storage. XSPI interfaces with decryption-on-the-fly (DOTF) allow encrypted code images to be stored in external flash and decrypted on the fly as it is securely transferred to the MCU for execution.

Ready to Use Solutions

Renesas provides a wide range of easy-to-use tools and solutions for the RA8P1 MCUs, including the Flexible Software Package (FSP), evaluation kits and development tools. FreeRTOS and Azure RTOS are supported, as is Zephyr. Several Renesas software example projects and application notes are available to enable faster time to market. In addition, numerous partner solutions are available to support development with the RA8P1 MCUs, including a driver monitoring solution from Nota.AI and a traffic/pedestrian monitoring solution from Irida Labs.

Key Features of the RA8P1 MCUs

Processors: 1GHz Arm Cortex-M85, 500MHz Ethos-U55, 250 MHz Arm Cortex-M33 (Optional)Memory: 1MB/512KB On-chip MRAM, 4MB/8MB External Flash SIP Options, 2MB SRAM fully ECC protected, 32KB I/D caches per core

Graphics Peripherals: Graphics LCD controller supporting resolutions up to WXGA (1280×800), parallel RGB and MIPI-DSI display interfaces, powerful 2D Drawing engine, parallel 16bit CEU and MIPI CSI-2 camera interfaces, 32bit external memory bus (SDRAM and CSC) interface

Other Peripherals: Gigabit Ethernet and TSN Switch, XSPI (Octal SPI) with XIP and DOTF, SPI, I2C/I3C, SDHI, USBFS/HS, CAN-FD, PDM and SSI audio interfaces, 16bit ADC with S/H circuits, DAC, comparators, temperature sensor, timers

Packages: 224BGA, 289BGA

Security: Advanced RSIP-E50D cryptographic engine, TrustZone, Immutable storage, secure boot, tamper resistance, DPA/SPA attack protection, secure debug, secure factory programming, Device Lifecycle management

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Built on Proven SuperGaN Technology, 650-V Gen IV Plus Devices Deliver Robust Performance with Superior Thermal Efficiency and Ultra-Low Power Loss

Renesas Electronics Corporation introduced three new high-voltage 650V GaN FETs for AI data centers and server power supply systems including the new 800V HVDC architecture, E-mobility charging, UPS battery backup devices, battery energy storage and solar inverters. Designed for multi-kilowatt-class applications, these 4th-generation plus (Gen IV Plus) devices combine high-efficiency GaN technology with a silicon-compatible gate drive input, significantly reducing switching power loss while retaining the operating simplicity of silicon FETs. Offered in TOLT, TO-247 and TOLL package options, the devices give engineers the flexibility to customize their thermal management and board design for specific power architectures.

The new TP65H030G4PRS, TP65H030G4PWS and TP65H030G4PQS devices leverage the robust SuperGaN platform, a field-proven depletion mode (d-mode) normally-off architecture pioneered by Transphorm, which was acquired by Renesas in June 2024. Based on low-loss d-mode technology, the devices offer superior efficiency over silicon, silicon carbide (SiC), and other GaN offerings. Moreover, they minimize power loss with lower gate charge, output capacitance, crossover loss, and dynamic resistance impact, with a higher 4V threshold voltage, which is not achievable with today’s enhancement mode (e-mode) GaN devices.

Built on a die that is 14 percent smaller than the previous Gen IV platform, the new Gen IV Plus products achieve a lower RDS (on) of 30 milliohms (mΩ), reducing on-resistance by 14 percent and delivering a 20 percent improvement in on-resistance output-capacitance-product figure of merit (FOM). The smaller die size reduces system costs and lowers output capacitance, which results in higher efficiency and power density. These advantages make the Gen IV Plus devices ideal for cost-conscious, thermally demanding applications where high performance, efficiency and small footprint are critical. They are fully compatible with existing designs for easy upgrades, while preserving existing engineering investments.

Available in compact TOLT, TO-247 and TOLL packages, they provide one of the broadest packaging options to accommodate thermal performance and layout optimization for power systems ranging from 1kW to 10kW, and even higher with paralleling. The new surface-mount packages include bottom side (TOLL) and top-side (TOLT) thermal conduction paths for cooler case temperatures, allowing easier device paralleling when higher conduction currents are needed. Further, the commonly used TO-247 package provides customers with higher thermal capability to achieve higher power.

“The rollout of Gen IV Plus GaN devices marks the first major new product milestone since Renesas’ acquisition of Transphorm last year,” said Primit Parikh, Vice President of the GaN Business Division at Renesas. “Future versions will combine the field-proven SuperGaN technology with our drivers and controllers to deliver complete power solutions. Whether used as standalone FETs or integrated into complete system solution designs with Renesas controllers or drivers, these devices will provide a clear path to designing products with higher power density, reduced footprint and better efficiency at a lower total system cost.”

Unique d-mode Normally-off Design for Reliability and Easy Integration

Like previous d-mode GaN products, the new Renesas devices use an integrated low-voltage silicon MOSFET – a unique configuration that achieves seamless normally-off operation while fully capturing the low loss, high efficiency switching benefits of the high- voltage GaN. As they use silicon FETs for the input stage, the SuperGaN FETs are easy to drive with standard off-the-shelf gate drivers rather than specialized drivers that are normally required for e-mode GaN. This compatibility simplifies design and lowers the barrier to GaN adaptation for system developers.

GaN-based switching devices are quickly growing as key technologies for next-generation power semiconductors, fueled by demand from electric vehicles (EVs), inverters, AI data center servers, renewable energy, and industrial power conversion. Compared to SiC and silicon-based semiconductor switching devices, they provide superior efficiency, higher switching frequency and smaller footprints.

Renesas is uniquely positioned in the GaN market with its comprehensive solutions, offering both high- and low-power GaN FETs, unlike many providers whose success in the field has been primarily limited to lower power devices. This diverse portfolio enables Renesas to serve a broader range of applications and customer needs. To date, Renesas has shipped over 20 million GaN devices for high- and low-power applications, representing more than 300 billion hours of field usage.

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Anritsu Corporation is proud to announce that its receiver test (SINK Test) solution for the latest DisplayPort 2.1 standard has been certified by the Video Electronics Standards Association (VESA), the international standards organization. Combining Anritsu’s Signal Quality Analyzer-R MP1900A with automation software from Granite River Labs (GRL) or Teledyne LeCroy achieves automated verification of data transmission quality and calibration.

DisplayPort 2.1 enables the digital transmission of high-definition and high-refresh-rate video, such as 8K. The standard is still being developed. Recently, the integration of the USB Type-C specifications has led to a significant expansion in the versatility of DisplayPort 2.1 and its adoption across a wide range of applications. However, a challenge facing the development of products that comply with the new standard is that manually verifying transmission signal quality and calibrating are time-consuming due to the complexity of the test equipment settings and the lengthy configuration and test procedures. This solution improves development efficiency and ensures the quality of video data transmission by automating the testing and calibration processes.

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The new 9155-900 Series 2.5mm-pitch vertical-mate battery connectors provide engineers in the industrial, automotive, datacom, household appliance, and consumer electronics markets with robust, reliable, and user-friendly power connectivity solutions.

KYOCERA AVX, a leading global manufacturer of advanced electronic components engineered to accelerate technological innovation and build a better future, has further expanded its industry-leading selection of standard battery connectors with the introduction of the new 9155-900 Series 2.5mm-pitch vertical-mate battery connectors.

The new 9155-900 Series 2.5mm-pitch vertical-mate battery connectors feature a unique contact geometry that deflects cleanly when a module, battery pack, mating connector, or PCB is vertically pushed into position, enabling full vertical engagement without the risk of contact damage. Traditional right-angle battery connectors require users to engage the contacts by inserting the mating module or battery pack at an angle before rotating it into position to reliably prevent contact damage that could negatively impact connector performance and lifetime. The 9155-900 Series does not. Infact, users can mate these connectors from any angle without inadvertently damaging the contacts, ensuring high-integrity connections regardless of user experience or skill level.

The 9155-900 Series 2.5mm-pitch vertical-mate battery connectors feature an extremely forgiving sweeping beam contact design and an anti-snag feature that reliably protects the contacts from damage during deflection, as well as when static. The series also features ultra-robust and -reliable gold-plated beryllium copper (BeCu) contacts that deliver excellent electrical and mechanical performance for up to 5,000 mating cycles and optional plastic locating bosses and solder tabs that maximize the mechanical stability of the connector in high-shock and vibration environments, like automotive applications.

The series features flame-retardant (UL94 V-0) black, glass-filled Nylon 46 insulators, two to six BeCu contacts with either 0.4µm or 0.8µm of selective gold-over-nickel plating (the former of which is suitable for most commercial and industrial applications and the latter of which is suitable for harsh-environment applications), and pure tin tails. They are rated for 500VACRMS or the DC equivalent, up to 3A, and operating temperatures extending from -40°C to +125°C. They are also REACH and RoHS compliant and shipped in tape and reel packaging in quantities of 800 for automated pick and place assembly.

Ideal applications for the new 9155-900 Series 2.5mm-pitch vertical-mate battery connectors extend throughout the industrial, automotive, datacom, household appliance, and consumer electronics markets and include handheld and portable industrial and consumer electronics devices that require docking or cradling, such as charging stations, internet and home appliances that require battery backup, and automotive applications that require the easy installation and removal of modules or battery packs, ranging from headsets, gaming controllers, and walkie talkies to automotive cooling fans.

“Traditional right-angle battery connectors with exposed contacts require pluggable modules to be inserted at an angle and then gently rotated into position to prevent contact damage. And while that may seem insignificant, the extra step required to safely and successfully mate traditional battery connectors increases the potential for mismating by half,” said Perrin Hardee, Product Marketing Manager at KYOCERA AVX. “Our new 9155-900 Series 2.5mm-pitch vertical-mate battery connectors are engineered to ensure proper mating from any angle and eliminate the possibility of inadvertently damaging the contacts during the process—regardless of user experience or skill level. They’re also compact and robust enough to withstand automotive levels of shock and vibration.”

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CHA0402 Microwave Resistors Deliver Stable High Frequency Performance Up to 50 GHz Under Harsh Environmental Conditions

Vishay Intertechnology, Inc. announced that it has expanded its CHA Series of AEC-Q200 qualified thin film chip resistors with new devices in the 0402case size. Available with a wide range of resistance values from 10 Ω to 500 Ω, CHA0402 resistors provide high frequency performance up to 50 GHz for automotive, telecom, medical, space, avionics, and military applications.

Now available in the 02016 and 0402 case sizes, CHA series devices offer very low internal reactance and exhibit behavior close to a pure resistor over their large frequency range, with a nearly flat Z/R curve to 70 GHz and 50 GHz, respectively. The microwave resistors maintain their high frequency stability even after the most stressful AEC-Q200 tests — validated by their ΔR and Z/R measurements — guaranteeing high performance under harsh environmental conditions.

The CHA series is ideal for automotive ADAS, LIDAR, connectivity, and 4D radar systems; LEO satellites and space communication systems; X-ray, MRI, and CAT scan machines; 5G / 6G telecommunications equipment, base stations, and repeaters; military guidance and telemetry systems; drones; and RF antennas. For these applications, the CHA0402 resistors provide limiting voltage of 37 V, rated power of 300 mW at +70 °C, and a temperature coefficient of ± 100 ppm/°C, with ± 50 ppm/°C available on request.

To reduce development time and costs, the devices’ S-parameter data is available for electronic simulation, in addition to 3D models for Ansys HFSS, Modelithics Microwave Global Models (PCB and pad-scalable), and design kits. RoHS-compliant, halogen-free, and Vishay Green, the resistors are offered in waffle pack and tape and reel packaging.

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Among the Highlights were Special Sessions Detailing the Status and Future Directions of Technology in Key Areas

The 75th annual 2025 IEEE Electronic Components and Technology Conference (ECTC), held at the Gaylord Texan Resort & Convention Center here May 27-30, had record attendance, a record number of paper submissions/presentations, record international and student participation, and a record number of exhibitors in a sold-out exhibition hall:

• 2,518 attendees, the highest in the conference’s 75-year history and a significant increase over the 2,008 who attended last year, which itself was a record.
• The number of abstracts submitted was the highest ever (775), as were the 390 technical papers presented in 36 oral and 5 interactive presentation sessions, including one dedicated to students.
• Several paper presentations attracted more than 600 attendees, as sessions on topics of intense industry interest – such as hybrid bonding– were standing-room only.
• 16 professional development courses were attended by 596 participants.
• There were speakers from more than 20 countries globally.
• There was a record level of industry support, with 51 corporate sponsors and 138 booths in the exhibit hall.

Among the highlights were 11 Special Sessions. In these, panels of industry experts discussed the present status and future roadmaps of technologies essential for artificial intelligence (AI), high-performance computing (HPC) and other fast-growing, evolving applications.

“Advanced chip packaging technologies are essential for the development of the electronics industry, and the ECTC conference has long been the world’s leading forum for advancements in microelectronics packaging and component science and technology,” said Przemyslaw Gromala, ECTC 2025 Program Chair and Chief Expert/R&D Project Leader at Robert Bosch GmbH. “ECTC serves as a collaborative global platform for exploring cutting-edge advancements in microelectronic packaging, fostering innovation and addressing key industry challenges. This year’s Special Sessions offered a rich selection of compelling topics and expert panelists.”

Here are highlights from three of the ECTC 2025 Special Sessions:

Advanced Materials for Enabling Co-Packaged Optics Integration – This Special Session was co-Chaired by Karan Bhangaonkar (Google) and Vidya Jayaram (Chipletz). Panelists were Mark Gerber (ASE), Z. Rena Huang (Rennselaer Polytechnic Inst.); Padraic Morrissey (Tyndall National Inst.), Kumar Abhishek Singh (Intel) and Christopher Striemer (AIM Photonics).

As modern computing strives for higher performance, co-packaged optics or CPO (i.e., the integration of optics and electronics on a substrate) is emerging as a solution to meet computing/communication demands for high bandwidth at low power. The innovations, challenges and future needs to realize CPO technology were discussed in this Special Session.

Gerber from ASE gave an overview of the system requirements that are driving CPO material considerations, noting that heat can have significant effects on photonic integrated circuits. He also identified other issues that increase thermal sensitivities in CPO architectures, such as flux outgassing, and described why the order in which assembly steps occur also has an impact.

Huang from RPI said that while much work is taking place to understand and address CPO packaging considerations, much more progress is needed, especially for AI chiplets for large-language models (LLMs), where the key concerns are speed, power and efficiency. She discussed the possibility to build optical networks on optical interposers/wafers/panels, noting that large chiplets could be optically connected with optical interposers, using optical waveguides to reduce loss.

Morrissey from Tyndall said that for optimum CPO performance, the optics must be moved closer to the edge of compute, and glass has great potential for use as a substrate because it’s optically transparent, has good RF behavior, and lends itself to fabricating high-quality vias. Glass also can work beyond wafers and with really large panels, he said, and can lead to pluggable connectivity. However, he noted that heat is an issue with glass.

Singh from Intel said CPO isn’t just desirable, it’s absolutely necessary to scale-up advanced packaging. He noted that CPO allows both edge and vertical interconnects, meaning there are many areas where materials come into play. He said that while CPO architectures face unique challenges – such as foreign particles blocking the light path – they also face many of the same issues as non-CPO architectures, such as misalignment and cracks. But these challenges bring opportunities to advance the state-of-the-art.

Striemer from Aim Photonics described why optically active materials will drive CPO, and also outlined the need for passive material innovations such as 3D printing and novel designs like suspended structures, although right now it’s unclear which ones will offer the most benefit.

Hybrid Bonding (HB): to B, or not to B? Needs and challenges for the next decade – This Special Session was co-Chaired by Benson Chan (Binghamton Univ.), Masha Gorchichko (Applied Materials) and Dishit Parekh (AMD). The panelists were Su Jin Ahn (Samsung), Anne Jourdain (imec), Chet Lenox (KLA), Laura Mirkarimi (Adeia), Masao Tomikawa (Toray Ind.) and Brett Wilkerson (AMD).

Hybrid bonding is the key technology for high-density 3D integration and advanced packaging, and in recent years, significant advancements were made in pitch scaling, die-to-die bonding, alternative materials, and low-temperature processes. But many engineering and technological challenges remain, such as defectivity, metrology, design challenges, and cost. This panel summarized recent advancements in HB, identified the most pressing issues limiting its adoption for mainstream electronics, and outlined its likely development over the next decade.

Gorchichko from Applied noted the different types of HB (wafer-wafer, die-wafer, die-die) and said that while HB debuted about 10 years ago in an image sensor from Sony, today the focus is on integrating DRAM memory. She said that advanced metrology is key, because we are now talking about molecular bonds, and therefore an understanding of all the relevant chemical and mechanical requirements is needed. Moreover, to get higher yields and more throughput, not just better but also faster metrology is needed. She noted that thermal concerns are an issue with increasing power density.

Su Jin Ahn from Samsung outlined major HB technology issues and challenges. One is that the many process steps required leave particles on the bonding surface, leading to potential failure. Another is that for AI, the wider, thinner dies used degrade bonding and lead to quality issues. She said what’s needed are advanced metrology/inspection tools and methods, along with design/process co-optimization for bonding. She said the main driver going forward is the need to combine chip and packaging technologies.

Jourdain from imec emphasized the need for fast, reliable metrology solutions, and discussed the pros and cons of copper interconnect and barrier metals.

Lenox from KLA noted the many needs and challenges that come with HB – interposers,  warpage control, dielectric interface profiles, clean singulation, bonding alignment – and said that while HB is important, there are other less complex and costly technologies that might preclude the need for HB, such as bridges. He also said that HB creates a need for advanced metrology and inspection capabilities all the way from the front end to packaging.

Mirkarimi from Adeia focused on three areas: metrology improvements for improved throughput and yield; the evolution of 2.5D/3.5D HB packaging technology; and thermal solutions for high power-density chipsets. With regard to metrology, she noted that HB architectural complexity demands a reliable “health of the line” metrology protocol for all process steps. Also, better ways to understand nanoscale topography and to detect surface defects are needed, as are ways to rework HB to reduce costs, such as bond energy engineering. Regarding HB packaging trends and challenges, she said that ultra-high bandwidth, inter-die communication at a 1µm die-to-wafer pitch will require system simplification, such as bonding dies directly to the substrate or using bridge dies to replace an interposer. For thermal management, she described a potential cooling solution that makes use of an integrated manifold and a cold plate bonded to an IC, among other features, and which can be custom-designed to manage specific heat maps.

Tomikawa from Toray said that as the need to bond chips to interposers increases, the need for HB processes that make use of polyimide (PI) resin will become more apparent. That’s because PI enables low-temperature, low-pressure HB processes which minimize warpage and device damage. Many challenges remain, though – precise copper protrusion control and low-temperature copper diffusion bonding are key factors for success.

Wilkerson from AMD spoke from a product perspective. He pointed out that HB requires complex processing. much time and many expensive fab processes, and that it can take several weeks to accomplish, which impacts a company’s time-to-market capabilities. He said thermal resistance is a critical issue, and that there’s a need for standards for the use of HB for memory integration with silicon.

Thermal Management Solutions for Next-Generation Backside Power Delivery – This Special Session was co-Chaired by Dwayne R. Shirley (Marvell) and Tiwei Wei (Purdue University/UCLA). The panelists were Muhannad Bakir (Georgia Tech), Dureseti Chidambarrao (IBM) and Herman Oprins (imec).

The increasing power density and thermal challenges in advanced semiconductor packaging have led to the development of backside power delivery (BPD) technology, where the power delivery network is relocated from the frontside to the backside of a silicon wafer. While it enhances power efficiency, performance, and design flexibility, BPD also introduces thermal management challenges and the need for innovative cooling solutions. Participants in this Special Session discussed the latest advancements and challenges in thermal management for next-generation BPD.

Bakir from Georgia Tech said that for 3D architectures, interlayer cooling is needed, but asked, how do we enable high-density interconnect within such a structure? He said the solution is to fabricate through-silicon via (TSV) structures with integrated cooling, electrical conductivity, and power, using vertical vias. He addressed the many issues that such a design brings – aspect ratios, TSV heights, etc.

Chidambarrao from IBM said that because there are lots of subtleties with BPD architectures, reducing the problem to important basics and solving it with enough accuracy is key. He noted that chip complexity significantly impacts thermal conductivity, and that level-to-level differences can be quite large. He said that an understanding of the entire chip overlay is needed, because there are tricky hot spots, and he described IBM’s strategy, which is to use machine learning plus FEA modeling to calculate the average properties of multiple levels together. He noted that BPD issues only become worse with 3D architectures.

Oprins from imec said it is absolutely critical to identify the basic problems with each particular BPD architecture, because there are so many different flavors of BPD.

Wei from Purdue/UCLA said that bond interfaces drive thermal impacts, and she gave an overview of research into different ways to deal with this issue, encompassing factors such as die thickness, CMOS-compatible structures like air gaps or glass bridges, trenches, copper/diamond microbump bonding, two-layer microchannel structures (i.e. manifolds), and others.

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Author: Ajay Kumar, R&D Principal FPGA Engineer, Keysight Technologies

The Open Radio Access Network (O-RAN) Alliance led by a group of mobile network operators (MNOs), has been the driving force for the evolution of 5G Radio Access Network (RAN). The aim is to steer the industry towards more open, interoperable, virtualized, and intelligent architecture. This article outlines the crucial validation steps needed to bring O-RAN radio from silicon to deployment-ready, secure and intelligent. It highlights the needs and challenges in pre- and post-silicon validation, multiple-input multiple-output (MIMO)/massive MIMO (mMIMO) performance verification, energy efficiency measurements, security testing, and radio management. To begin, let us explore the brief history, evolution, and architecture of the RAN.

Historically, RAN deployments have been dominated by proprietary hardware from a small group of vendors, leading to high cost and limited flexibility. O-RAN addresses these challenges by disaggregating the RAN architecture and introducing standardized interfaces for interoperability and virtualization. This open approach fosters flexibility enabling organizations to mix and match solutions from different vendors bringing down costs and promoting innovation.

In addition, recent advancements in artificial intelligence (AI) and machine learning (ML) are further enhancing O-RAN by making it more intelligent. This move will enable even more innovation when it comes to energy efficiency, enhancing security, network optimization, and maintenance of the network.

Key Components of O-RAN architecture

Figure 1 below breaks down the key components of O-RAN architecture which includes:

• O-RAN radio unit (O-RU): Performs analog/RF transmitter and receiver functions along with processing the lower part of the physical layer such as Fast Fourier Transform (FFT)/inverse FFT (IFFT), beamforming, precoding, cyclic prefix insertion/removal, and compression/decompression.
• O-RAN distributed unit (O-DU): Handles baseband processing, scheduling, radio link control, medium access control, and the upper part of the physical layer.
• O-RAN central unit (O-CU): A centralized and virtualized unit that is responsible for the packet data convergence protocol layer.
• O-RAN intelligent controller (O-RIC): Handles near real-time and non-real-time service to gather information from the network and uses artificial intelligence and machine learning to perform the necessary optimization tasks.
• Service Management and Orchestration (SMO): Manages and orchestrates the RAN centrally including both RICs.

Figure 1: O-RAN architecture with user equipment and core network.

The Radio Unit (RU) is a critical fronthaul component, providing wireless connectivity to user equipment. It communicates with the rest of the O-RAN components to transfer information to and from the core network. O-RAN alliance 7.2x split option redistributes physical layer functions between O-RU and O-DU to strike a balance between fronthaul bandwidth requirement, latencies and the complexity of the components. This influences the overall O-RU architecture of radio unit by adding signal processing functions to the digital part of the radio.

During the product development cycle, design teams validate functionality through block-level simulations. However, at the system level, simulation complexity and runtime increase dramatically. This makes it vital to initiate pre-silicon validation at the right stage and well before tape-out.

Pre-Silicon Validation to Build Confidence Before Tape-Out

Pre-silicon validation involves emulating the design before fabricating the chip to provide a more accurate representation of the design in real-world conditions. This step helps to achieve testing goals in a reasonable time span by identifying design flaws early on. However, to determine the required test cases for specific functions, a thorough understanding of the test specifications is required. These test specifications cover a wide variety of tests for control, user, synchronization and management (CUSM) plane protocols.

Creating test vectors that conform to 5G standards is a complex task, given the vast number of parameters involved.  Adding to the challenge, these test stimuli need to be sent in a synchronous manner from both Ethernet interface on DU and either through the non-standardized time-domain IQ interface or the RF interface side for complete radio.

Figure 2: O-RU ASIC test protocol stack

To achieve the pre-silicon testing goals, it is important to have pre-verified test suites to avoid spending time debugging the test cases itself. Test setup observability is also of utmost importance in order to identify and resolve any issued early, and to prevent potential flaws from being carried over into the final taped out design. Figure 2 shows O-RU test protocol stack and controller test setup for ASIC emulation.

Post-Silicon Validation to Bridge Gap for Production

While the interoperability testing methodology, which involved testing the components together as a gNB, has remained largely consistent, conformance testing has evolved. Conformance testing ensures that each component adheres to specifications defined by the O-RAN Alliance.

To maintain momentum in the fast-paced design cycle, a smooth transition is required from pre-silicon to post-silicon validation. Hence, the same workflow and tools for signal generation and analysis are required to reuse the same test suite.

Figure 3: O-RU testing and validation test setup diagram and flow

In the post-silicon phase, testing access is primarily limited to the O-RAN and RF ports of the O-RU. To test O-RU, as illustrated in Figure 3, an O-DU emulator is required to send and receive CUSM-plane messages on O-RAN port, a vector signal analyzer to receive downlink RF signal sent by O-RU and a signal generator to send uplink signal to O-RU. Additional equipment may be required for non-conducted tests. All these test setup components are required to synchronize to common clock and work with-in tight fronthaul timing requirements.

MIMO and Massive MIMO to Achieve Desired Performance

MIMO and mMIMO technologies use multiple antennas – typically 16 or more for mMIMO systems, to serve multiple users simultaneously on the same frequency band. This increases spectral efficiency and throughput. With massive MIMO, advanced beamforming techniques need to be applied to steer radio signals precisely towards users to improve signal quality and reduce interference. However, as system complexity grows, performance validation can be highly complex, time-consuming and expensive.

To test massive MIMO radio unit, an O-DU emulator is required with tools to construct, play, capture and measure O-RAN traffic over ethernet interface; and multi-RF transceiver to generate the beams with noise and interference in different directions and receive at the same time. Test setups not only need to measure all beams and signals in uplink and downlink directions but also have the ability to pinpoint beamforming issues. Figure 4 shows an example of downlink beamforming with magnitude and phase weightings and corresponding beam patterns and EVM figures.

Figure 4: Downlink beamforming with magnitude and phase weightings and corresponding beam patterns, EVM figures

Energy Efficiency for Sustainability

With the exponential growth in wireless connectivity, energy efficiency has become a top priority for operators in order to reduce operational costs, achieve sustainability goals and reduce environmental impact. As many studies have shown that majority of energy is consumed by RAN, the O-RAN community is working on standardizing energy saving modes, with the goal to reduce power consumption without degrading the quality of service.

O-RU is the most power-hungry component in the access network. However, energy saving can be accomplished by numerous means such as variable clocking, dynamic power amplifier biasing, cell & carrier shutdown, RF channel reconfiguration, sleep modes, discontinuous transmission & reception. With the disaggregation of RAN, there is need to characterize each component to completely understand the trade-offs at system and network level. Figure 5 shows O-RU site power dissipation over a 24-hour period with and without microsleep enabled and potential savings.

Figure 5: O-RU site power dissipation over a 24-hour period

Security Testing for Uninterrupted Radio Access

In a disaggregated, multivendor O-RAN environment, there are increased security risks for individual components, interfaces, network functions, and data. The O-RAN threat modeling and risk assessment specification includes over 160 distinct threats to these elements including O-RU.

Each element, protocol, and interface need to be scanned for vulnerabilities, stressed under real-world threat scenarios and checked for performance under simulated attacks. It is also important to ensure effective risk mitigation strategies are in place. With this in mind, automated security testing is critical, not only for compliance with security standards but to ensure guaranteed radio access, and alignment with O-RAN zero trust principles.

Radio Management with RIC for Operational Efficiencies

While the Service Management and Orchestration (SMO) layer handles the coordination of network resources, the RIC plays a key role in optimizing radio access network performance. The non-real-time RIC uses rApps to apply AI/ML-driven long-term optimization for less time sensitive operations. Whereas, the near-real-time RIC deploys xApps to make   real-time network adjustments that are between ten milliseconds to one second.

Together, these controllers enhance network utilization and operational efficiency through advanced functions such as beam management and radio resource management. To ensure reliable performance, both open-loop and closed-loop strategies must be implemented and rigorously tested for continuous optimization.

Conclusion

The journey of O-RAN radio unit from silicon validation to smart networks is highly complex but essential to realize the full potential of open and intelligent networks. To keep up with accelerated design cycles and ensuring compliance with O-RAN fronthaul standards, it is essential to have well-planned test setups, robust tools, pre-verified test cases, and automated test suites to transition smoothly through different phases.

The post Validating the O-RAN Radio: From Silicon to Smart Networks appeared first on ELE Times.

With WiseWare 1.1, GaN-Based Designs Achieve Compact Size and Peak Efficiency

Wise Integration, a pioneer in digital control for gallium nitride (GaN) and GaN IC-based power supplies, announced the release to production of its first fully digital controller, WiseWare 1.1 (WIW1101) based on the MCU 32 bits. This milestone innovation enables high-frequency operation up to 2 MHz, unlocking new levels of power density, efficiency, and form factor in compact AC-DC power converters. The product is now ready for volume production in customer-validated designs.

“This release marks a strategic milestone for Wise Integration’s roadmap,” said Thierry Bouchet, CEO of Wise Integration. “WiseWare 1.1 represents more than a product—it’s a key pillar in our vision to redefine power electronics through digital control. It strengthens our value proposition in high-density power conversion and reinforces our leadership as GaN technology scales to mass adoption.”

Digitally Driven, GaN Optimized

Unlike legacy analog solutions, WiseWare 1.1 leverages the speed and switching capabilities of GaN (gallium nitride) through a proprietary digital control algorithm in a MCU 32 bits, that enables zero voltage switching (ZVS) across all power transistors. Designed specifically for totem pole power-factor correction (PFC) architectures in critical-construction mode (CrCM), this controller allows engineers to dramatically reduce the size, weight, and thickness of magnetic components while maintaining >98 percent efficiency.

Customer-Proven Performance and Global Momentum

WiseWare 1.1 supports a broad power range from 100 W to 1.5 kW, making it suitable for a wide array of modern applications requiring both compactness and high energy efficiency.

Designed with flexibility in mind, WiseWare 1.1 works seamlessly with standard GaN across the full RDS(on) spectrum (drain-source on-resistance), giving power designers the freedom to choose the optimal transistor for each application—without compromising performance.

Typical applications include:

• High-efficiency AC-DC power converters,
• High-power density designs,
• Power supplies for servers,
• USB power delivery adapters for laptops and notebooks, and
• Switch-mode power supplies for monitors and displays.

The WiseWare 1.1 platform has already demonstrated robust market validation, with multiple customer design-ins and live demos at PCIM Europe, one of the industry’s most prominent power- electronics exhibitions. These demonstrations showcased 300W totem pole PFC converter boards using WiseWare 1.1 and WiseGan WI71060A transistors (RDS(on)=60mohms), operating from 90–264 VAC input to a 400 VDC output. At the same time, technical collaborations are progressing in Asia, reinforcing the company’s global reach.

Technical Highlights of WiseWare 1.1 (WIW1101)

• Switching frequency: up to 2 MHz
• Control mode: CrCM ensuring full ZVS
• Integrated protections: OCP, OVP, OTP, OPP
• Inrush management: no need for relay or thermistor
• Standby power: as low as 18 mW
• EMC-compliant demoboard with >98 percent efficiency

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