Збирач потоків

submitted by /u/mosfet01 [link] [comments]

I wanted experiment with them for a while, but I always thought that building a clock is just boring, so instead in making a nixie display for my geiger counter! submitted by /u/Thick_Swordfish6666 [link] [comments]

Union Minister of State for Electronics and Information Technology Shri Jitin Prasada, stated India’s achievements from the Semicon India Programme. The Indian Government launched the programme to develop a complete ecosystem ranging from design, fabrication, assembly, testing and packaging.

The government approved 10 units worth Rs. 1.6 lakh crore to set up Silicon fab, Silicon Carbide fab, advanced packaging, memory packaging, among others. These are expected to cater to chip requirements of multiple sectors such as consumer appliances, industrial electronics, automobiles, telecommunications, aerospace, and power electronics. The minister also recalled how some of the approved projects are also using indigenous technology for assembly, testing and packaging of semiconductor chips.

Additionally, the Product Linked Incentive scheme (PLI) for large scale electronics manufacturing of mobile phones and certain specified components, attracted an investment of Rs 14,065 Cr. up to October 2025.

Design Development

On the design front, the government launched the Design Linked Incentive scheme (DLI), which provided support to 23 companies (24 designs) for designing chips and SoCs for the products in satellite communication, drones, surveillance camera, Internet of Things (IoT) devices, LEDs driver, AI devices, telecom equipment, smart meter, etc. Additionally, to assist with infrastructure, the government provided free design tool (EDA) access to 94 startups, enabling 47 lakh hours of design tool usage.

Developing a Skilled Workforce

Realising the importance of skilled workforce in the semiconductor manufacturing process, the government also launched several programmes and collaborations to build a skilled workforce for India. The All India Council for Technical Education (AICTE) has launched various courses to provide technical training to students.

The government’s Chips to Start-up (C2S) Programme encourage India’s young engineers, where the government provides latest design tools (EDA) to 397 universities and start-ups.

A Skilled Manpower Advanced Research and Training (SMART) Lab has also been setup in NIELIT Calicut with an aim to train 1 lakh engineers nation-wide. More than 62 thousand engineers have already been trained.

ISM has also partnered with Lam Research for conducting a large-scale training programme in nanofabrication and process-engineering skills. These would further augment skilled workforce for ATMP and advanced packaging. The program aims to generate 60,000 trained manpower in next 10 years.

Subsequently, the FutureSkills PRIME program is a collaborative initiative of MeitY and National Association of Software and Service Companies (NASSCOM) aimed at making India a cutting-edge digital talent nation.

The post India’s Semicon Programme: From Design to Packaging appeared first on ELE Times.

I’ve always regarded debugging and troubleshooting as the most challenging of all hands-on engineering skills. It’s not formally taught; it is usually learned through hands-on experience (often the hard way) and almost every case is different. And it’s a long list of why debugging and troubleshooting are often so difficult.

In some cases, there’s the “aha” moment when the problem is clearly identified and knocked down, but in many other cases, you are “pretty sure” you’ve got the problem but not completely so.

Note that I distinguish between debugging and troubleshooting. The former is when you are working on a breadboard or prototype that is not working and perhaps has never fully worked; it’s in the design phase. The latter is when a tested, solid product with some track record and field exposure misbehaves or fails in use. Each has its own starting points and constraints, but the terms are used interchangeably by many people.

Every engineer or technician has his or her own horror story of an especially challenging situation. It’s especially frustrating when there is no direct, consistent one-to-one link between observed symptoms and root cause(s). There are multiple cause/effect scenarios:

• Clarity: The single-problem, single-effect situation—generally, the easiest to deal with.
• Causality: A single problem with multiple causes, where one problem (often not directly visible) triggers a second, more visible one.
• Correlation: Two apparent problems, with one common cause—or maybe the observed symptoms are unrelated? It’s also easy to have the assumption that correlation implies causality, but that is often not the case.
• Coincidence: Two apparent problems that appear linked but really have no link at all.
• Confusion: A problem with contradictory explanations, where the explanation addresses one aspect but does not explain the others.
• Consistent: The problem is intermittent with no consistent set of circumstances that cause it to occur.

My recent dilemma

Whatever the cause(s) of faults, the most frustrating situation for engineers is where the problem is presumably fixed, but no clear cause (or causes) is found. This happened to me recently with my home heating system, which heats up water for domestic use and for radiator heating. It has one small pump sending heated water to a storage tank and a second small pump sending it to radiators; both pumps do not run at the same time.

One morning, I saw that we lost heat and hot water, so I checked the system (just four years old) and saw that the service-panel circuit breaker with a dedicated line had tripped.

A tripped breaker is generally bad news. My first thought was that perhaps there had been some AC-line glitch during the night, but all other sensitive systems in the house—PCs, network interfaces, and plug-in digital clocks—were fine. Perhaps some solar flare or cosmic particles had targeted just this one AC feed? Very unlikely. I reset the breaker and the system ran for about an hour, then the breaker tripped again.

I called the service team that had installed the system, they came over and they, too, were mystified. The small diagnostic panel display on the system said all was fine. They noted that my thermostat was a 50-year-old mechanical unit, similar to the classic 1953 round Honeywell unit, designed by Henry Dreyfus and now in the permanent display at Cooper Hewitt/Smithsonian Design Museum in New York (Figure 1). These two-wire units, with their bimetallic strip and glass-enclosed mercury-wetted switch, are extremely reliable; millions are still in use after many decades.

 

Figure 1 You have to start somewhere: The first step was to take out a possible but unlikely source of the problem. So, the mercury-wetted metallic-strip thermostat (above) similar to the classic Honeywell unit was replaced with a simple PRO1 T701 electronic equivalent (below). Sources: Cooper Hewitt Museum

While failure of these units is rare, technicians suggested replacing it “just in case.” I said, sure, “why not?” and replaced it with a simple, non-programmable, non-connected electronic unit that emulates the functions of the mechanical/mercury one.

But we knew that was very unlikely to be the actual problem, and the repair technicians could not envision any scenario where a thermostat—on 24-V AC loop with contact closure to energize a mechanical or solid-state relay to call for heat—could induce a circuit breaker to trip. Maybe the original thermostat contacts were “chattering” excessively, thus inducing the motor to cycle on and off rapidly? Even so, that shouldn’t trip a breaker.

Once again, the system ran for about an hour and then the breaker tripped. The techs spend some time adjusting the system’s hot water and heating water pumps; each has a small knob that selects among various operating modes.

Long-story short: the “fixed” system has been working fine for several weeks. But…and it’s a big “but” …they never did actually find a reason for the circuit-breaker tripping. Even if the pumps were not at their optimum settings, that should not cause an AC-line breaker to trip. And why would the system run for several years without a problem.

What does it all mean?

From an engineering perspective, that’s the most frustrating outcome. Now, even though the system is running, it still has me in that “somewhat worried” mental zone. A problem that should not have occurred did occur several times, but now it has gone away for no confirmed reason.

There’s not much that can be done to deal with non-reproducible problems such as this one. Do I need an AC-line monitor, as perhaps that’s the root cause? What sort of other long-term monitoring instrumentation is available for this heating system? How long would you have it “baby-sit” the system?

Perhaps there was an intermittent short circuit in the system’s internal AC wiring that caused the breaker to trip, and the act of opening the system enclosure and moving things around made the intermittent go away? We can only speculate.

Right now, I’m trying to put this frustrating dilemma out of my mind, but it’s not easy. Online troubleshooting guides are useless, as they have generic flowcharts asking, “Is the power on?” “Are the cables and connectors plugged in and solid?”

Perhaps I’ll instead re-read the excellent book, “DeBugging: The 9 Indispensable Rules for Finding Even the Most Elusive Software and Hardware Problems” by David J. Agans (Figure 2). Although my ability and desire to poke, probe, and swap parts of a home heating system are close to zero.

Figure 2 This book on systematic debugging of electronic designs and products (and software) has many structured and relevant tactics for both beginners and experienced professionals. Source: Digital Library—Association for Computing Machinery

Or perhaps the system just wanted some personal, hands-on attention after four years of faithful service alone in the basement.

Have you ever had a frustrating failure where you poked, pushed, checked, measured, swapped parts, and did more, with the problem eventually going away—yet you really have no idea what the problem was? How did you handle it? Did you accept it and move on or pursue the mystery further?

Related Content

• The double-fault is the debugging challenge
• Why debugging has become more challenging
• Debugging: Skill, persistence, luck, and discipline
• Dimensional differences complicate simple circuit troubleshooting

The post Troubleshooting often involves conflicting symptoms and scenarios appeared first on EDN.

With the transition to 800V electric vehicles (EVs) affecting the whole powertrain (including the power electronics), IDTechEx’s report ‘Power Electronics for Electric Vehicles 2026–2036: Technologies, Markets, and Forecasts’, this trend is analysed and used to forecast the adoption of wide-bandgap semiconductors silicon carbide (SiC) and gallium nitride (GaN), as well as the entire power electronics market for EVs...

Lumentum Holdings Inc of San Jose, CA, USA (which designs and makes photonics products for optical networks and lasers for industrial and consumer markets) has appointed Thad Trent to its board of birectors, expanding the board membership to nine members...

Caliber Interconnect Solutions Private Limited, a global engineering and deep-tech solutions company, has introduced its latest Three Phase Monitoring Relay, to address the growing need for reliable electrical protection across India’s industrial, infrastructure, and renewable energy sectors.

As industries increasingly operate in environments affected by voltage fluctuations and power quality challenges, the relay is designed to deliver accurate and dependable monitoring. Built on True RMS (TRMS) measurement principles, it provides precise voltage assessment even under distorted or unstable electrical conditions—an essential requirement for modern manufacturing, HVAC, power distribution, and solar installations.

Suresh Babu, Managing Director, Caliber Interconnects, said, “With rapid electrification and automation across Indian industry, electrical reliability has become a foundational requirement. This Three Phase Monitoring Relay is engineered to ensure consistent system protection and operational continuity in real-world conditions.”

The relay continuously monitors all three phases and detects critical electrical anomalies, including over-voltage and under-voltage with configurable thresholds, phase imbalance, phase loss, and phase sequence faults—issues that are among the most common causes of industrial equipment failure. Clear LED fault indications enable quick identification and troubleshooting at the panel level, supporting faster response by maintenance teams.

Manufactured using UL 94 V-0 grade flame-retardant material, the device emphasizes safety and durability. Its compact 19.1 mm footprint and fast response time of under two seconds make it suitable for space-constrained panels and contemporary industrial control systems.

Designed and manufactured in India, the Three Phase Monitoring Relay aligns with the country’s focus on electrical safety, energy efficiency, and resilient industrial infrastructure. Caliber Interconnects brings over two decades of experience in delivering high-reliability engineering and product solutions across semiconductors, automotive, railways, avionics, and medical sectors, serving customers in India, Singapore, the United States, Japan, Malaysia, and Israel. The company is ISO 9001, AS9100D, and ISO 27001 certified.

The Three Phase Monitoring Relay is suitable for a wide range of applications including industrial machinery, HVAC systems, motors, generators, pumps, compressors, solar energy systems, and electrical control panels. It is available through Caliber Interconnects’ offices in Bengaluru and Coimbatore, supporting deployment across India.

The post Caliber Launches Advanced 3-Phase Monitoring Relay for India’s Industries appeared first on ELE Times.

Allied Engineering Works Pvt. Ltd. (AEW), manufacturer of Smart Electricity Meters, announced jointing the Wirepas Ecosystem with the aim to provide meters fully compatible with the Wirepas Certified Platform. This step marks the company’s commitment to enabling large-scale, highly reliable and interoperable Smart Metering Solutions in India based on the market proven Wirepas RF Mesh. Wirepas’ recently announced Wirepas Certified Platform in India provides a unified framework to ensure guaranteed performance, interoperability and reliability for India’s ambitious AMI deployments.

“Joining the Wirepas ecosystem is a key step in our roadmap,” said Ashutosh Goel, CMD, AEW. “We are confident that this technology can effectively address India’s smart metering needs and are committed to developing meters that meet the stringent requirements.”

Wirepas CEO Teppo Hemiä commented: “We are thrilled to welcome AEW into the Wirepas ecosystem. Their commitment is a strong reflection of the growing momentum we see across India. The Wirepas model has always been built on collaboration with local partners and on doing things transparently together. The ambition and readiness of manufacturers like AEW are essential for achieving the massive scale India requires. We look forward to supporting their journey toward fully compliant, high-performance products.

Joining the Wirepas ecosystem reinforces AEW’s long-term strategy to deliver robust, interoperable, and scalable solutions for India’s rapidly expanding smart metering programs.

The post AEW & Wirepas Partner to Accelerate Smart Meter Rollout in India appeared first on ELE Times.

ANRITSU CORPORATION announced its New Radio RF Conformance Test System “ME7873NR” to have achieved PCS Type Certification Review Board (PTCRB) certification for the first time *A in test cases related to non-terrestrial networks (NR NTN) utilizing 5G technology, using Samsung’s NR NTN modem chipset.

The NTN is a communication system that integrates satellite communication and airborne technologies along with terrestrial infrastructure, leveraging satellites in low Earth orbit (LEO), medium Earth orbit (MEO), and geostationary Earth orbit (GEO).

3GPP Release 17 introduces “NR NTN”, which includes Non-Terrestrial Networks into the 5G New Radio (NR) standards. With this advance, 5G devices can connect to satellites using the same protocols as terrestrial base stations, paving the way for global 5G coverage beyond traditional infrastructure.

The PTCRB definition of NR NTN testing signifies the formal commencement of the NTN device certification process. Going forward, NR NTN is expected to be actively adopted by network operators worldwide to enhance service quality and expand coverage. Anritsu will contribute to the proliferation of NTN devices by providing certification test systems.

Product Overview

The ME7873NR is a 3GPP-compliant 5G RF conformance test platform certified by both the Global Certification Forum (GCF) and PCS Type Certification Review Board (PTCRB). It supports Frequency Range 1 (FR1, Sub-6 GHz) out-of-the-box, and combining it with an OTA (CATR) chamber * adds support for Frequency Range 2 (FR2, mmWave).

For more information about ME7873NR

Learn more about “Non-Terrestrial Networks (NTNs)”

*A For PTCRB certification test cases related to NR NTN (Anritsu survey, December 2025)

Technical Terms

* OTA (CATR) Chamber: Compact Antenna Test Range. A 3GPP-compliant CATR anechoic chamber designed to block external radio waves and prevent internal reflections to accurately measure wireless   device performance via over-the-air transmission and reception.

The post World’s First 5G NR NTN Certification: Anritsu and Samsung Lead RFCT Testing appeared first on ELE Times.

It shines. Not that long though. Loosing around 0.3 V on diodes. submitted by /u/WeekSpender [link] [comments]

Not sure where I got these. They just showed up on my bench one day submitted by /u/Simple_Impress4156 [link] [comments]

This is one of the crazier things I've ever seen. Someone (apparently?!) took a $9 IKEA smart button, reverse engineered the PCB in order to spin their own custom form factor board that fits inside their specific wall switch buttons and then transfers all the components from the original PCB to their custom one by hand. source: https://www.reddit.com/r/tradfri/comments/1pnil9l/custom_button_converted_ikea_somrig/ submitted by /u/winston109 [link] [comments]

t submitted by /u/whoistheprogrammer [link] [comments]

Sometimes, when an audio component dies, the root cause is something electrical. Other times, the issue instead ends up being fundamentally mechanical.

Delta sigma modulation-based digital-to-analog conversion (DAC) circuitry dominates the modern high-volume audio market by virtue of its ability (among other factors) to harness the high sample rate potential of modern fast-switching and otherwise enhanced semiconductor processes. Quoting from Wikipedia’s introduction to the as-usual informative entry on the topic (which, as you’ll soon see, also encompasses analog-to-digital converters, i.e., ADCs):

Delta-sigma modulation is an oversampling method for encoding signals into low bit depth digital signals at a very high sample-frequency as part of the process of delta-sigma analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). Delta-sigma modulation achieves high quality by utilizing a negative feedback loop during quantization to the lower bit depth that continuously corrects quantization errors and moves quantization noise to higher frequencies well above the original signal’s bandwidth. Subsequent low-pass filtering for demodulation easily removes this high frequency noise and time averages to achieve high accuracy in amplitude, which can be ultimately encoded as pulse-code modulation (PCM).

 Both ADCs and DACs can employ delta-sigma modulation. A delta-sigma ADC encodes an analog signal using high-frequency delta-sigma modulation and then applies a digital filter to demodulate it to a high-bit digital output at a lower sampling-frequency. A delta-sigma DAC encodes a high-resolution digital input signal into a lower-resolution but higher sample-frequency signal that may then be mapped to voltages and smoothed with an analog filter for demodulation. In both cases, the temporary use of a low bit depth signal at a higher sampling frequency simplifies circuit design and takes advantage of the efficiency and high accuracy in time of digital electronics.

Primarily because of its cost efficiency and reduced circuit complexity, this technique has found increasing use in modern electronic components such as DACs, ADCs, frequency synthesizers, switched-mode power supplies and motor controllers. The coarsely-quantized output of a delta-sigma ADC is occasionally used directly in signal processing or as a representation for signal storage (e.g., Super Audio CD stores the raw output of a 1-bit delta-sigma modulator).

Oversampled interpolation vs quantization noise shaping

That said, plenty of audio purists object to the inherent interpolation involved in the delta-sigma oversampling process. Take, for example, this excerpt from the press release announcing Schiit’s $249 first-generation Modi Multibit DAC, today’s teardown patient, back in mid-2016:

Multibit DACs differ from the vast majority of DACs in that they use true 16-20 bit D/A converters [editor note: also known as resistor ladder, specifically R-2R, D/A converters] that can reproduce the exact level of every digital audio sample. Most DACs use inexpensive delta-sigma technology with a bit depth of only 1-5 bits to approximate the level of every digital audio sample, based on the values of the samples that precede and follow it.

Here’s more on the Modi Multibit 1 bill of materials, from the manufacturer:

Modi Multibit is built on Schiit’s proprietary multibit DAC architecture, featuring Schiit’s unique closed-form digital filter on an Analog Devices SHARC DSP processor. For D/A conversion, it uses a medical/military grade, true multibit converter specified down to 1/2LSB linearity, the Analog Devices AD5547CRUZ.

That said, however, plenty of other audio purists object to the seemingly inferior lab testing results for multibit DACs versus delta-sigma alternatives (including those from Schiit itself), particularly in the context of notably higher comparative prices of multibit offerings. Those same detractors, exemplifying one end of the “objectivist” vs “subjectivist” opinion spectrum, would likely find it appropriate that in the “Schiit stack” whose photo I first shared a few months ago (and which I’ll discuss in detail in another post to come shortly):

I coupled a first-generation Modi Multibit (bottom) with a Vali 2++ tube-based headphone amplifier (top), both Schiit devices delivering either “enhanced musicality” (if you’re a subjectivist) or “desultory distortion” (for objectivists). For what it’s worth, I don’t consistently align with either camp; I was just curious to audition the gear and compare the results against more traditional delta-sigma DAC and discrete- or op amp-based amplifier alternatives!

A sideways wiggle did the trick

That said, I almost didn’t succeed in getting the Modi Multibit into the setup at all. My wife had bought it for me off eBay as a Valentine’s Day gift in (claimed gently) used condition back in late January; it took me a few more months to get around to pressing it into service. Cosmetically, it indeed looked nearly brand new. But when I flipped the backside power switch…nothing. This in spite of the fact that the AC transformer feeding the device still seemed to be functioning fine:

The Modi Multibit was beyond the return-for-refund point, and although the seller told me it had been working fine when originally shipped to us, I resigned myself to the seemingly likely reality that it’d end up being nothing more than a teardown candidate. But after subsequently disassembling it, I found nothing scorched or otherwise obviously fried inside. So, on a hunch and after snapping a bunch of dissection photos and then putting it back together and reaching out to the manufacturer to see if it was still out-of-warranty repairable (it was), I plugged it back into the AC transformer and wiggled the power switch back and forth sideways. Bingo; it fired right up! I’m now leaving the power switch in the permanently “on” position and managing AC control to it and other devices in the setup via a separately switchable multi-plug mini-strip:

What follows are the photos I’d snapped when I originally took the Modi Multibit apart, starting with some outside-chassis shots and as-usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes. Front first; that round button, when pressed, transitions between the USB, optical S/PDIF, and RCA (“coaxial”) S/PDIF inputs you’ll see shortly, selectively illuminating the associated front panel LED-of-three to the right of the button at the same time:

Left side:

Back, left-to-right are the:

• Unbalanced right and left channel analog audio outputs
• RCA (“coaxial”) digital S/PDIF input
• Optical digital S/PDIF input
• USB digital input
• The aforementioned flaky power switch, and
• 16V AC input

Transformers vs voltage converters

Before continuing, a few words about the “wall wart”. It’s not, if you haven’t yet caught this nuance, a typical full AC-to-DC converter. Instead, it steps down the premises AC voltage to either 16V (which is actually, you may have noticed from the earlier multimeter photo, more like 20V unloaded) for the Modi Multibit or 24V for the Vali 2++, with the remainder of the power supply circuitry located within the audio component itself:

Fortunately, since the 16V and 24V transformer output plugs are dissimilar, there’s no chance you’ll inadvertently blow up the Modi Multibit by plugging the Vali 2++ wall wart into it!

Onward, right side:

Bottom:

And last but not least, the top, including the distinctive “Multibit” logo, perhaps obviously not also found on delta-sigma-implementing Schiit DACs:

Let’s start here, with those four screw heads you see, one in each corner:

With them removed, the aluminum top piece pops right off:

Next up, the two screw heads on the back panel:

And finally, the three at the steel bottom plate:

At this point, the PCB slides out, although you need to be a bit careful in doing so to prevent the steel frame’s top bracket from colliding with tall components along the PCB’s left edge:

Firmware fixes

Here’s a close-up of the PCB topside’s left half:

AC-to-DC conversion circuitry dominates the far left portion of the PCB. The large IC at the center is C-Media Electronics’ CM6631A (PDF) USB 2.0 high-speed true HD audio processor. Below it is the associated firmware chip, with an “MD218” sticker on top. The original firmware, absent the sticker, had a minor (and effectively inaudible, but you know how picky audiophiles can be) MSB zero-crossing glitch artifact that Schiit subsequently fixed, also sending replacement firmware chips to existing device owners (or alternatively updating them in-house for non-DIYers).

And here’s the PCB topside’s right half:

Now for the other side:

In the bottom left quadrant are two On Semiconductor MC74HC595A (PDF) 8-bit serial-input/serial or parallel-output shift registers with latched 3-state outputs. Above them is the aforementioned “resistor ladder DAC”, Analog Devices’ AD5547. Above it and to either side are a pair of Analog Devices AD8512A (PDF) dual precision JFET amplifiers. And above them is STMicroelectronics’ TL082ID dual op amp.

Shift your eyes to the right, and you’ll not be able to miss the largest IC on this side of the PCB. It’s the Analog Devices ADSP-21478 SHARC DSP, also called out previously in Schiit’s press release. Above it is an AKM Semiconductor AK4113 six-channel 24-bit stereo digital audio receiver chip for the Modi Multibit’s two S/PDIF inputs. And on the other side…

is a SST (now Microchip Technology) 39LF010 1Mbit parallel flash memory, presumably housing the SHARC DSP firmware.

Wrapping up, here are some horizontal perspectives of the front, back, and left-and-right sides:

And that’s “all” I’ve got for you today! In the future, I plan to compare the first-generation Modi Multibit against its second-generation successor, which switches to a Schiit-developed USB interface, branded as Unison and based on a Microchip Technologies controller, and also includes a NOS (non-oversampling) mode option, along with stacking it up against several of Schiit’s delta-sigma DAC counterparts. Until then, let me know your thoughts in the comments!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

Related Content

• Class D: Audio amplifier ascendancy
• Audio amplifiers: How much power (and at what tradeoffs) is really required?
• A holiday shopping guide for engineers: 2025 edition
• Audio Amplifiers from Class A, B, D to T

The post The Schiit Modi Multibit: A little wiggling ensures this DAC won’t quit appeared first on EDN.

Advances in the automotive industry continue to make cars safer, more efficient, and more reliable than ever. As motor vehicles become more advanced, so do the silicon components that serve as the backbone of their advanced features. Case in point: the requirement for and proliferation of data logging systems is an item that has become increasingly prevalent.

In particular, event data recorder (EDR) and data storage system for autonomous driving (DSSAD) have been the source of significant attention due to recent worldwide legislation. While both systems function to provide safe and reliable storage of driving data, there are a few key distinctions (Table 1).

Table 1 Here is a comparison between EDR and DSSAD data loggers. Source: Infineon

As regulations governing automotive data logging evolve, so do the specifications for the associated memory that stores the data. For instance, in the United States, these storage requirements were recently revised to “extend the EDR recording period for timed data metrics from 5 seconds of pre-crash data at a frequency of 2 Hz to 20 seconds of pre-crash data at a frequency of 10 Hz”. These effects will be enforced on September 1, 2027, for most manufacturers with a few exceptions for altered vehicles and small-volume production lines.

Regulations such as these are not unique to the United States but rather echoed worldwide. Recently, the United Nations Economic Commission for Europe (UNECE) has sought to standardize automotive data logging requirements across its constituents with key pieces of regulation. These regulations provide guidelines for EDR in passenger vehicles, heavy-duty vehicles, and DSSAD as it pertains to Automated Lane Keeping Systems (ALKS). As these regulations grow and are adopted by constituents, the demand for hardware storage systems becomes paramount in the automotive industry.

Data storage requirements

The National Highway Traffic Safety Administration (NHTSA) in the United States gives insight into existing EDR solutions, describing them as having “a random-access memory (RAM) buffer the size of one EDR record to locally store data before the data is written to memory. The data is typically stored using electrically erasable programmable read-only memory (EEPROM) or data flash memory”.

This document also provides an overview of concerns and industry feedback regarding the requirement changes. The feedback indicated that “while the proposed 20 seconds of pre-crash data could be recorded by EDRs, some EDRs may require significant hardware and software changes to meet these demands”.

On the other hand, DSSAD requires storage of all events over a set period. While the previously referenced NHTSA document applies only to EDR, a similar solution could fulfill these requirements by buffering incoming signals before transferring them to long-term storage in a non-volatile memory.

Given the strain on current systems from growth in requirements, the quest for an optimized solution becomes pertinent. All things considered, the ideal system must provide power-loss robustness for buffered data and enough space for long-term storage. With these requirements in mind, this article will discuss how using F-RAM and NOR flash together meets the modern challenges of data logging.

Flash F-RAM combo

Ferroelectric random-access memory (F-RAM) stores information in a ferroelectric capacitor. The dipoles within this material—oriented based on the direction of applied charge—maintain their orientation after power is no longer applied. This type of memory is characterized by fast write speeds and high endurance (~1014 cycles).

These characteristics give F-RAM a unique advantage over other non-volatile memory technologies. However, densities for F-RAM are low, ranging from a few kilobits to tens of megabits, limiting its scope for high density applications.

NOR flash is another type of memory which uses a MOSFET to store electric charge within a non-metallic region of the transistor’s gate. This memory is typically more complex in its operation—for instance, the necessity of an erase operation—than F-RAM and may offer additional features such as password protection or a one-time programmable secure silicon region. NOR flash offers small-granular random access for reading but requires large-granular access to write operations.

Multiple bits must be erased simultaneously and then programmed in order to “write” to the device. Thus, timing for device operations is generally slower compared to F-RAM, and endurance is comparatively limited (~106 cycles). However, NOR flash holds the advantage of a larger storage size, with ranges up to a few gigabits.

This article will showcase how F-RAM + NOR flash compares to RAM + NOR flash as a solution for EDR and DSSAD. For this analysis, data was logged in a ring buffer within the front-end device continuously. During event triggers for EDR or conditions where the buffer filled for DSSAD, the information was transferred to the back-end device, where the data was held in long term storage (Figure 1).

Figure 1 The block diagram shows front-end and back-end storage in a logging operation. Source: Infineon

To evaluate performance, Table 2 below uses requirements from both EDR and DSSAD for the comparison. These specifications for EDR and DSSAD were based on the UN regulations for heavy duty vehicles and for ALKS DSSAD requirements, respectively. To discuss how these systems work, it’s important to review the specifications from these documents and highlight the assumptions made by the comparison.

Table 2 The performance comparison between EDR and DSSAD is conducted across multiple technologies. Source: Infineon

For logging systems that use EDR, data elements are required to be logged continuously and transferred to long term storage solely in the case of an event, such as a car accident. A ring buffer in the front-end device accomplishes this effectively. To determine the size of this buffer, the expected EDR data rate is needed alongside the storage time requirements.

From the legislation, required parameters were used as a part of the calculation. The relevant time interval (commonly 20 seconds pre-crash data, 10 seconds post-crash data) and logging frequency (4 Hz, 10 Hz, or single instance) were also utilized for calculations. One important assumption was a fixed EDR data packet size of 12 Bytes.

The UNECE document has no requirement for using a set number of bytes for storage or for storing any information outside of the parameter data. This comparison assumes an 8-byte time stamp of metadata will be included alongside an estimated 3 bytes for parameter data and 1 byte for parameter identification. Using the previous calculations and assumptions, the expected buffer size was calculated to be 790 Kbits.

In the case of the event, the entire buffer would be transferred to the back-end storage. It is required that “the EDR non-volatile memory buffer shall accommodate the data related to at least five different events”. Thus, five events worth of storage were allocated, resulting in a back-end EDR buffer size of 3.95 Mbits.

On the other hand, DSSAD requires all data elements to be stored rather than a set amount of data within an event window. Therefore, a relatively small buffer can be used on the front-end which can be migrated to the back-end device once filled. It was assumed that the buffer must be large enough to store all events if a sector erase is in progress and must be completed before transferring the data to NOR flash.

For this analysis, the maximum DSSAD rate is assumed to be 10 events/second. Furthermore, each packet was estimated to be a fixed size of 25 bytes. This would include the time and date stamp (estimated as 8 bytes) and parameter data (estimated as 1 byte) which are required in the regulation, alongside the GPS coordinates (estimated as 16 bytes), which are not required but are included as metadata in this analysis. This results in a front-end DSSAD buffer size of 5.3 Kbits.

Meanwhile, for the back-end device, an assumption of 6 months of DSSAD data storage was implemented. The size of the back-end buffer is determined by the average expected DSSAD rate multiplied by the 6-month period. Using an estimated DSSAD rate 4 events/minute and the fixed 25-byte packet size, the back-end buffer was calculated to be 210 Mbits.

Memory endurance characteristics

The sum of the buffer sizes determined the required densities for each of the components in Table 2. For this analysis, the F-RAM and NOR flash endurance characteristics were demonstrated by Infineon’s SEMPER NOR flash and EXCELON F-RAM devices. Endurance was assumed to be infinite for the front-end SRAM device, but data packets are considered lost during a power failure as this is a volatile memory.

This comparison model attempted to find the smallest density that could meet a life expectancy endurance requirement of 20 years.  The results of this comparison are shown in Table 2.

As shown in the table, the critical F-RAM + NOR flash solution advantage is in the case of a power loss situation. The worst-case scenario is in a situation where buffered information in volatile RAM without using a back-up battery would result in the loss of significant vehicle data during a crash.

In this case, if an erase is required at the start of an event, the system could lose all 20 seconds of pre-crash data plus the 2.68 seconds of time it takes to perform an erase on a 256-Mb SEMPER NOR device if the power is lost as the erase is completed. The corresponding data lost is calculated based on the assumed EDR and DSSAD data rates over this time.

Despite the high rate of cycling through the ring buffer, the EXCELON F-RAM was able to meet the endurance requirements and match the life expectancy of the RAM + SEMPER NOR flash solution.

As far as other potential front-end solutions, it should be noted that using other non-volatile technologies for the front-end such as EEPROM or RRAM would potentially require higher density requirements due to the lower endurance capabilities compared to F-RAM. Furthermore, the fast write time of EXCELON F-RAM provides proper storage for data packets sent to the front-end device in the immediate time frame prior to a power loss.

Why memory matters in data logging

Given the growth of EDR and DSSAD and the legal implications associated with these systems, reliable data storage is paramount and therefore reflected in legislative requirements. For instance, the requirement of “adequate protection against manipulation like data erasure of stored data such as anti-tampering design”. While there are different ways to secure the logged data on a system, a simple and robust method involves hardware.

The future of autonomous driving depends on logging for legal records, safety, and cutting-edge features. As systems become more complex, memory technologies are frequently challenged for performance, requiring creative solutions to satisfy the requirements.

Kyle Holub is applications engineer at Infineon Technologies.

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• Why FRAMs suit data logging in EDR for airbags, ADAS
• Why FRAM memories are suitable for data logging in ADAS designs

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Дякуємо Товариству Червоного Хреста України! kpi пн, 12/15/2025 - 14:05

Студент НН ІТС Данііл Потомахін – віце-чемпіон Європи з пауерліфтингу Інформація КП пн, 12/15/2025 - 13:01

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